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公开(公告)号:US11588644B2
公开(公告)日:2023-02-21
申请号:US16843414
申请日:2020-04-08
Applicant: Micron Technology, Inc.
Inventor: Robert W. Strong , Michael B. Danielson
Abstract: A data storage device is provided. The data storage device includes a storage medium having a first subset configured to store user data and a second subset configured to store snapshot data. The data storage device further includes a controller configured to (i) receive, from a host operably coupled to the data storage device, a command to configure the second subset, to (ii) verify an authenticity of the command, and to (iii) execute the command in response to the verification of the authenticity of the command.
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公开(公告)号:US20190258569A1
公开(公告)日:2019-08-22
申请号:US16402560
申请日:2019-05-03
Applicant: Micron Technology, Inc.
Inventor: Jeffrey L. McVay , Daniel J. Hubbard , Robert W. Strong , Michael B. Danielson , Jonathan Tanguy
Abstract: The present disclosure includes apparatuses and methods for directed sanitization of memory. One example method comprises, responsive to receiving a sanitization command, performing a deterministic garbage collection operation on a memory, wherein performing the deterministic garbage collection operation results in physical erasure of all invalid data stored on the memory without losing valid data stored on the memory.
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公开(公告)号:US10068109B2
公开(公告)日:2018-09-04
申请号:US15829718
申请日:2017-12-01
Applicant: Micron Technology, Inc.
Inventor: Kenny T. Coker , David A. Pohm , Stephen P. Van Aken , Michael B. Danielson
Abstract: An apparatus for performing secure operations with a dedicated secure processor is described in one embodiment. The apparatus includes security firmware defining secure operations, a processor configured to execute the security firmware and perform a set of operations limited to the secure operations, and a plurality of secure hardware registers, accessible by the processor and configured to receive instructions to perform the secure operations. An apparatus for performing secure operations with a plurality of security assist hardware circuits is described in another embodiment. The apparatus comprises one or more secure hardware registers configured to receive a command to perform secure operations and one or more security assist hardware circuits configured to perform discrete secure operations using one or more secret data objects.
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公开(公告)号:US11574664B2
公开(公告)日:2023-02-07
申请号:US17675945
申请日:2022-02-18
Applicant: Micron Technology, Inc.
Inventor: Paul A. Suhler , Ram Krishan Kaul , Michael B. Danielson
IPC: G11C7/10 , G06F12/0804 , G06F3/06
Abstract: An example method of encoding data attributes by data stream identifiers includes: receiving, by a controller managing a memory device, a write command, wherein the write command specifies a first data item and an identifier of a data stream, wherein the data stream comprises the first data item and a second data item; determining, by parsing the identifier of the data stream, a data attribute encoded by the identifier of the data stream, wherein the data attribute is shared by the first data item and the second data item; determining, using the data attribute, a storage operation parameter; and transmitting, to the memory device, an instruction specifying the first data item and the storage operation parameter.
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公开(公告)号:US20210173574A1
公开(公告)日:2021-06-10
申请号:US17248360
申请日:2021-01-21
Applicant: Micron Technology, Inc.
Inventor: James H. Meeker , Michael B. Danielson , Paul A. Suhler
IPC: G06F3/06
Abstract: A processing device receives a first instruction specifying that first data is to remain on a first memory device of a plurality of memory devices, the first memory device comprising a first media having a first media type. The processing device further receives a second instruction specifying, based on one or more criteria, that second data is to be moved from the first media having the first media type to a second memory device of the plurality of memory devices, the second memory device comprising a second media having a second media type that is different than the first media type. The processing device further controls the first and second data in the plurality of memory devices based on the first instruction and the second instruction.
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公开(公告)号:US10452532B2
公开(公告)日:2019-10-22
申请号:US15404407
申请日:2017-01-12
Applicant: Micron Technology, Inc.
Inventor: Jeffrey L. McVay , Daniel J. Hubbard , Robert W. Strong , Michael B. Danielson , Jonathan Tanguy
Abstract: The present disclosure includes apparatuses and methods for directed sanitization of memory. One example method comprises, responsive to receiving a sanitization command, performing a deterministic garbage collection operation on a memory, wherein performing the deterministic garbage collection operation results in physical erasure of all invalid data stored on the memory without losing valid data stored on the memory.
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公开(公告)号:US20190013949A1
公开(公告)日:2019-01-10
申请号:US15645694
申请日:2017-07-10
Applicant: Micron Technology, Inc.
Inventor: Robert W. Strong , Michael B. Danielson
Abstract: A data storage device is provided. The data storage device includes a storage medium having a first subset configured to store user data and a second subset configured to store snapshot data. The data storage device further includes a controller configured to (i) receive, from a host operably coupled to the data storage device, a command to configure the second subset, to (ii) verify an authenticity of the command, and to (iii) execute the command in response to the verification of the authenticity of the command.
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公开(公告)号:US09864879B2
公开(公告)日:2018-01-09
申请号:US14876600
申请日:2015-10-06
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Kenny T. Coker , David A. Pohm , Stephen P. Van Aken , Michael B. Danielson
CPC classification number: G06F21/78 , G06F21/60 , G06F21/602 , G06F21/72 , G06F21/76
Abstract: An apparatus for performing secure operations with a dedicated secure processor is described in one embodiment. The apparatus includes security firmware defining secure operations, a processor configured to execute the security firmware and perform a set of operations limited to the secure operations, and a plurality of secure hardware registers, accessible by the processor and configured to receive instructions to perform the secure operations. An apparatus for performing secure operations with a plurality of security assist hardware circuits is described in another embodiment. The apparatus comprises one or more secure hardware registers configured to receive a command to perform secure operations and one or more security assist hardware circuits configured to perform discrete secure operations using one or more secret data objects.
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公开(公告)号:US11720690B2
公开(公告)日:2023-08-08
申请号:US17146278
申请日:2021-01-11
Applicant: Micron Technology, Inc.
Inventor: Jeffrey Munsil , Michael B. Danielson
CPC classification number: G06F21/602 , H04L9/0819
Abstract: A processing device of a memory sub-system is configured to receive, from a host system, host data to be stored at a memory sub-system in an encrypted form; determine that the host data exceeds a threshold size associated with an encryption operation; separate the host data into a plurality of segments based on the threshold size associated with the encryption operation; determine that a particular segment of the plurality of segments does not satisfy a size requirement of data associated with the encryption operation; modify the particular segment to satisfy the size requirement of data associated with the encryption operation; encrypt each of the plurality of segments based on the encryption operation; and store the encrypted plurality of segments at the memory sub-system.
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公开(公告)号:US11543980B2
公开(公告)日:2023-01-03
申请号:US17248360
申请日:2021-01-21
Applicant: Micron Technology, Inc.
Inventor: James H. Meeker , Michael B. Danielson , Paul A. Suhler
IPC: G06F3/06
Abstract: A processing device receives a first instruction specifying that first data is to remain on a first memory device of a plurality of memory devices, the first memory device comprising a first media having a first media type. The processing device further receives a second instruction specifying, based on one or more criteria, that second data is to be moved from the first media having the first media type to a second memory device of the plurality of memory devices, the second memory device comprising a second media having a second media type that is different than the first media type. The processing device further controls the first and second data in the plurality of memory devices based on the first instruction and the second instruction.
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