公开(公告)号：US11836380B2

公开(公告)日：2023-12-05

申请号：US17304522

申请日：2021-06-22

Applicant: Micron Technology, Inc.

Inventor： Parag R. Maharana ,  Anirban Ray ,  Gurpreet Anand ,  Samir Rajadnya ,  Paul Stonelake ,  Samir Mittal

IPC: G06F3/06 ,  G06F13/42 ,  G06F13/16

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0622 ,  G06F3/0688 ,  G06F13/1668 ,  G06F13/4282 ,  G06F2213/0024

Abstract: A processing device, operatively coupled with one or more memory devices, is configured to provide a plurality of virtual memory controllers, partition one or more memory devices into a plurality of physical partitions, and associate each of the plurality of virtual memory controllers with one of the plurality of physical partitions. The processing device further provides a plurality of physical functions, wherein each of the plurality of physical functions corresponds to a different one of the plurality of virtual memory controllers, and presents the plurality of physical functions to a host computing system over a peripheral component interconnect express (PCIe) interface.

公开(公告)号：US11068203B2

公开(公告)日：2021-07-20

申请号：US16355271

申请日：2019-03-15

Applicant: Micron Technology, Inc.

Inventor： Parag R. Maharana ,  Anirban Ray ,  Gurpreet Anand ,  Samir Rajadnya ,  Paul Stonelake ,  Samir Mittal

IPC: G06F3/06 ,  G06F13/42 ,  G06F13/16

Abstract: A system controller, operatively coupled with one or more memory devices, is configured to provide a plurality of virtual memory controllers, wherein each of the plurality of virtual memory controllers is associated with a different portion of the one or more memory devices, and provide a plurality of physical functions, wherein each of the plurality of physical functions corresponds to a different one of the plurality of virtual memory controllers. The system controller further presents the plurality of physical functions to a host computing system over a peripheral component interconnect express (PCIe) interface, the host computing system to assign each of the plurality of physical functions to a different virtual machine running on the host computing system.

公开(公告)号：US20200042246A1

公开(公告)日：2020-02-06

申请号：US16355271

申请日：2019-03-15

Applicant: Micron Technology, Inc.

Inventor： Parag R. Maharana ,  Anirban Ray ,  Gurpreet Anand ,  Samir Rajadnya ,  Paul Stonelake ,  Samir Mittal

IPC: G06F3/06 ,  G06F13/16 ,  G06F13/42

Abstract: A system controller, operatively coupled with one or more memory devices, is configured to provide a plurality of virtual memory controllers, wherein each of the plurality of virtual memory controllers is associated with a different portion of the one or more memory devices, and provide a plurality of physical functions, wherein each of the plurality of physical functions corresponds to a different one of the plurality of virtual memory controllers. The system controller further presents the plurality of physical functions to a host computing system over a peripheral component interconnect express (PCIe) interface, the host computing system to assign each of the plurality of physical functions to a different virtual machine running on the host computing system.

公开(公告)号：US20210311665A1

公开(公告)日：2021-10-07

申请号：US17304522

申请日：2021-06-22

Applicant: Micron Technology, Inc.

Inventor： Parag R. Maharana ,  Anirban Ray ,  Gurpreet Anand ,  Samir Rajadnya ,  Paul Stonelake ,  Samir Mittal

IPC: G06F3/06 ,  G06F13/42 ,  G06F13/16

Abstract: A processing device, operatively coupled with one or more memory devices, is configured to provide a plurality of virtual memory controllers, partition one or more memory devices into a plurality of physical partitions, and associate each of the plurality of virtual memory controllers with one of the plurality of physical partitions. The processing device further provides a plurality of physical functions, wherein each of the plurality of physical functions corresponds to a different one of the plurality of virtual memory controllers, and presents the plurality of physical functions to a host computing system over a peripheral component interconnect express (PCIe) interface.