公开(公告)号：US20230297285A1

公开(公告)日：2023-09-21

申请号：US18121874

申请日：2023-03-15

Applicant: Micron Technology, Inc.

Inventor： Amitava Majumdar ,  Anandhavel Nagendrakumar ,  Mohammed Ebrahim Hargan ,  Scott Garner ,  Danilo Caraccio ,  Daniele Balluchi ,  Chia Wei Chang ,  Ankush Lal

IPC: G06F3/06 ,  G11C11/406

CPC classification number: G06F3/0659 ,  G06F3/0619 ,  G06F3/0673 ,  G11C11/406

Abstract: An apparatus can include a number of memory devices and a memory controller coupled to one or more of the number of memory devices. The memory controller can include a row hammer detector. The memory controller can be configured increment for a first time period a row counter in a first data structure and a refresh counter. The memory controller can be configured to increment for a second time period a row counter in a second data structure and the refresh counter. The memory controller can be configured to determine that a value of the refresh counter exceeds a refresh threshold and responsive to the determination that the value of the refresh counter exceeds the refresh threshold, issue a notification.

公开(公告)号：US20250053343A1

公开(公告)日：2025-02-13

申请号：US18929332

申请日：2024-10-28

Applicant: Micron Technology, Inc.

Inventor： Amitava Majumdar ,  Anandhavel Nagendrakumar ,  Mohammed Ebrahim Hargan ,  Scott Garner ,  Danilo Caraccio ,  Daniele Balluchi ,  Chia Wei Chang ,  Ankush Lal

IPC: G06F3/06 ,  G11C11/406

Abstract: An apparatus can include a number of memory devices and a memory controller coupled to one or more of the number of memory devices. The memory controller can include a row hammer detector. The memory controller can be configured increment for a first time period a row counter in a first data structure and a refresh counter. The memory controller can be configured to increment for a second time period a row counter in a second data structure and the refresh counter. The memory controller can be configured to determine that a value of the refresh counter exceeds a refresh threshold and responsive to the determination that the value of the refresh counter exceeds the refresh threshold, issue a notification.

公开(公告)号：US12131071B2

公开(公告)日：2024-10-29

申请号：US18121874

申请日：2023-03-15

Applicant: Micron Technology, Inc.

Inventor： Amitava Majumdar ,  Anandhavel Nagendrakumar ,  Mohammed Ebrahim Hargan ,  Scott Garner ,  Danilo Caraccio ,  Daniele Balluchi ,  Chia Wei Chang ,  Ankush Lal

IPC: G06F3/06 ,  G11C11/406

CPC classification number: G06F3/0659 ,  G06F3/0619 ,  G06F3/0673 ,  G11C11/406

Abstract: An apparatus can include a number of memory devices and a memory controller coupled to one or more of the number of memory devices. The memory controller can include a row hammer detector. The memory controller can be configured increment for a first time period a row counter in a first data structure and a refresh counter. The memory controller can be configured to increment for a second time period a row counter in a second data structure and the refresh counter. The memory controller can be configured to determine that a value of the refresh counter exceeds a refresh threshold and responsive to the determination that the value of the refresh counter exceeds the refresh threshold, issue a notification.