公开(公告)号：US20210064467A1

公开(公告)日：2021-03-04

申请号：US16554931

申请日：2019-08-29

Applicant: Micron Technology, Inc.

Inventor： Todd M. Buerkle ,  Debra M. Bell ,  Joshua E. Alzheimer

IPC: G06F11/10

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may directly access a portion of memory array that is otherwise reserved for ECC functionality of a memory device. The memory array may correspond to a set of memory addresses, where each memory address of the set corresponds to a first portion of the memory array (e.g., user data plane) and to a second portion of the memory array (e.g., ECC plane). The second portion may be configured to store ECC data or second user data or metadata based on whether the ECC functionality is enabled or disabled. The memory device may determine a command directed to the memory address of the set is configured to access the first portion or the second portion based on a status of a pin associated with the command.

公开(公告)号：US11031070B1

公开(公告)日：2021-06-08

申请号：US16773672

申请日：2020-01-27

Applicant: Micron Technology, Inc.

Inventor： Todd M. Buerkle ,  Eric J. Stave

IPC: G11C7/10 ,  G11C11/4093 ,  G11C11/4076 ,  G11C11/408 ,  G06F9/54 ,  G06F9/30 ,  H04L25/03

Abstract: A method for equalizing command/address signals in a memory device includes receiving a status of a termination pin for a memory device and automatically performing equalization on signals received on a command/address bus channel of the memory device based on the status. An apparatus for equalizing command/address signals in a memory device includes an input buffer circuit configured to receive the signals from a command/address bus channel. The apparatus also includes a filter circuit configured to automatically perform equalization on the signals based on a status of a termination pin.

公开(公告)号：US11755412B2

公开(公告)日：2023-09-12

申请号：US17539714

申请日：2021-12-01

Applicant: Micron Technology, Inc.

Inventor： Todd M. Buerkle ,  Debra M. Bell ,  Joshua E. Alzheimer

IPC: G11C29/00 ,  G06F11/10 ,  G11C29/38

CPC classification number: G06F11/1076 ,  G06F11/1012 ,  G06F11/1052 ,  G11C29/38

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may directly access a portion of memory array that is otherwise reserved for ECC functionality of a memory device. The memory array may correspond to a set of memory addresses, where each memory address of the set corresponds to a first portion of the memory array (e.g., user data plane) and to a second portion of the memory array (e.g., ECC plane). The second portion may be configured to store ECC data or second user data or metadata based on whether the ECC functionality is enabled or disabled. The memory device may determine a command directed to the memory address of the set is configured to access the first portion or the second portion based on a status of a pin associated with the command.

公开(公告)号：US20220091938A1

公开(公告)日：2022-03-24

申请号：US17539714

申请日：2021-12-01

Applicant: Micron Technology, Inc.

Inventor： Todd M. Buerkle ,  Debra M. Bell ,  Joshua E. Alzheimer

IPC: G06F11/10

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may directly access a portion of memory array that is otherwise reserved for ECC functionality of a memory device. The memory array may correspond to a set of memory addresses, where each memory address of the set corresponds to a first portion of the memory array (e.g., user data plane) and to a second portion of the memory array (e.g., ECC plane). The second portion may be configured to store ECC data or second user data or metadata based on whether the ECC functionality is enabled or disabled. The memory device may determine a command directed to the memory address of the set is configured to access the first portion or the second portion based on a status of a pin associated with the command.

公开(公告)号：US11200118B2

公开(公告)日：2021-12-14

申请号：US16554931

申请日：2019-08-29

Applicant: Micron Technology, Inc.

Inventor： Todd M. Buerkle ,  Debra M. Bell ,  Joshua E. Alzheimer

IPC: G01R31/28 ,  G06F11/10 ,  G11C29/38

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may directly access a portion of memory array that is otherwise reserved for ECC functionality of a memory device. The memory array may correspond to a set of memory addresses, where each memory address of the set corresponds to a first portion of the memory array (e.g., user data plane) and to a second portion of the memory array (e.g., ECC plane). The second portion may be configured to store ECC data or second user data or metadata based on whether the ECC functionality is enabled or disabled. The memory device may determine a command directed to the memory address of the set is configured to access the first portion or the second portion based on a status of a pin associated with the command.