公开(公告)号：US20130166057A1

公开(公告)日：2013-06-27

申请号：US13775878

申请日：2013-02-25

Applicant: Micron Technology, Inc.

Inventor： Lingyi A. Zheng ,  Trung T. Doan ,  Lyle D. Breiner ,  Er-Xuan Ping ,  Kevin L. Beaman ,  Ronald A. Weimer ,  Cem Basceri ,  David J. Kubista

IPC: G05B19/00

CPC classification number: H01L28/40 ,  H01L21/3141 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/84

Abstract: The present disclosure provides small scale capacitors (e.g., DRAM capacitors) and methods of forming such capacitors. One exemplary implementation provides a method of fabricating a capacitor that includes sequentially forming a first electrode, a dielectric layer, and a second electrode. At least one of the electrodes may be formed by a) reacting two precursors to deposit a first conductive layer at a first deposition rate, and b) depositing a second conductive layer at a second, lower deposition rate by depositing a precursor layer of one precursor at least one monolayer thick and exposing that precursor layer to another precursor to form a nanolayer reaction product. The second conductive layer may be in contact with the dielectric layer and have a thickness of no greater than about 50 Å.

Abstract translation: 本公开提供小尺寸电容器（例如，DRAM电容器）以及形成这种电容器的方法。 一个示例性实施例提供了一种制造电容器的方法，该电容器包括顺序地形成第一电极，电介质层和第二电极。 可以通过以下方式形成至少一个电极：a）使两个前体反应以第一沉积速率沉积第一导电层，以及b）通过沉积一个前体的前体层以第二较低沉积速率沉积第二导电层 至少一层单层，并将该前体层暴露于另一种前体以形成纳米层反应产物。 第二导电层可以与介电层接触并具有不大于约的厚度。