SYSTEMS AND METHODS FOR MITIGATING CRACK MEANDERING IN SEMICONDUCTOR DICING

    公开(公告)号:US20250069952A1

    公开(公告)日:2025-02-27

    申请号:US18788846

    申请日:2024-07-30

    Abstract: Systems and methods for mitigating crack meandering, are disclosed herein. In some embodiments, the method includes forming a metallic layer over planned scribe regions of an upper surface of a wafer, then selectively patterning and/or etching the metallic layer to form a plurality of isolated lines over the planned scribe regions. The method can then include depositing a passivation material over the plurality of isolated lines. Adjacent isolated lines can be separated from each other by a small enough distance to disrupt the deposition process, thereby creating a gap in the passivation material between each of the adjacent isolated lines. The gaps and/or trenches formed in the top surface of the wafer by etching the passivation material through the gaps can help attract cracks during a stealth dicing process, thereby reducing the amount the cracks meander away from the planned scribe regions.

Patent Agency Ranking