公开(公告)号：US20240249776A1

公开(公告)日：2024-07-25

申请号：US18411532

申请日：2024-01-12

Applicant: Micron Technology, Inc.

Inventor： Vinh Quang Diep ,  Ching-Huang Lu ,  Yingda Dong

IPC: G11C16/10 ,  G11C16/08 ,  G11C16/12

CPC classification number: G11C16/102 ,  G11C16/08 ,  G11C16/12

Abstract: A request to execute a programming operation to program a set of memory cells associated with a target wordline of a memory device is identified. At a first time during application of a programming voltage to the target wordline, causing a first adjusted pass through voltage to be applied to a first portion of a first set of drain-side wordlines of the memory device. At a second time during application of the programming voltage to the target wordline, causing a second pass through voltage to be applied to a second portion of the first set of drain-side wordlines and to one or more source-side wordlines of the memory device, where the first adjusted pass through voltage is greater than the second pass through voltage.

公开(公告)号：US12300322B2

公开(公告)日：2025-05-13

申请号：US18103978

申请日：2023-01-31

Applicant: Micron Technology, Inc.

Inventor： Vinh Quang Diep ,  Jeffrey Ming-Hung Tsai ,  Ching-Huang Lu ,  Yingda Dong

IPC: G11C16/00 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/34

Abstract: A memory device comprising a memory array and control logic operatively coupled with the memory array. The control logic is to: detect a program operation directed at a selected wordline of multiple wordlines of the memory array; determine, during an initial phase of the program operation, whether a program voltage being applied to the selected wordline satisfies a threshold program voltage; add, in response to the program voltage not satisfying the threshold program voltage, a base offset voltage to an initial pass voltage to generate a higher pass voltage, the initial pass voltage being a percentage of an initial program voltage; and cause the higher pass voltage to be applied to a remainder of the multiple wordlines other than the selected wordline.

公开(公告)号：US20240071515A1

公开(公告)日：2024-02-29

申请号：US18235183

申请日：2023-08-17

Applicant: Micron Technology, Inc.

Inventor： Ching-Huang Lu ,  Vinh Quang Diep ,  Avinash Rajagiri ,  Yingda Dong

IPC: G11C16/16 ,  G11C16/04

CPC classification number: G11C16/16 ,  G11C16/0483

Abstract: Control logic of a memory device to initiate an erase operation including a set of erase loops to erase one or more memory cells of the memory device. During a first erase loop of the set of erase loops, a first erase pulse having an erase voltage level is caused to be applied to a source line associated with the one or more memory cells. During the first erase loop, a first erase bias voltage having an initial voltage level is caused to be applied to a first select gate and a second erase bias voltage having the initial voltage level is caused to be applied to a second select gate associated with the source line, where the first erase bias voltage level is based on a first delta voltage level. During a subset of erase loops following the first erase loop, a second erase pulse having the erase voltage level is caused to be applied to the source line. During the subset of erase loops, a first adjusted erase bias voltage is caused to be applied to the first select gate and a second adjusted erase bias voltage is caused to be applied to the second select gate.

公开(公告)号：US20230268003A1

公开(公告)日：2023-08-24

申请号：US18103978

申请日：2023-01-31

Applicant: Micron Technology, Inc.

Inventor： Vinh Quang Diep ,  Jeffrey Ming-Hung Tsai ,  Ching-Huang Lu ,  Yingda Dong

IPC: G11C16/10 ,  G11C16/34 ,  G11C16/08 ,  G11C16/04

CPC classification number: G11C16/10 ,  G11C16/3459 ,  G11C16/08 ,  G11C16/0483

Abstract: A memory device comprising a memory array and control logic operatively coupled with the memory array. The control logic is to: detect a program operation directed at a selected wordline of multiple wordlines of the memory array; determine, during an initial phase of the program operation, whether a program voltage being applied to the selected wordline satisfies a threshold program voltage; add, in response to the program voltage not satisfying the threshold program voltage, a base offset voltage to an initial pass voltage to generate a higher pass voltage, the initial pass voltage being a percentage of an initial program voltage; and cause the higher pass voltage to be applied to a remainder of the multiple wordlines other than the selected wordline.