公开(公告)号：US20240185926A1

公开(公告)日：2024-06-06

申请号：US18517903

申请日：2023-11-22

Applicant: Micron Technology, Inc.

Inventor： Huai-Yuan Tseng ,  Kishore Kumar Mucherla ,  William Charles Filipiak ,  Eric N. Lee ,  Andrew Bicksler ,  Ugo Russo ,  Niccolo' Righetti ,  Christian Caillat ,  Akira Goda ,  Ting Luo ,  Antonino Pollio

IPC: G11C16/10 ,  G11C16/16 ,  G11C16/34

CPC classification number: G11C16/102 ,  G11C16/16 ,  G11C16/3404

Abstract: A variety of applications can include one or more memory devices having user data preloaded for the application prior to reflowing the memory devices on the system platform of the application. A touch-up data refresh method can be implemented to gain read window budget and to improve retention slope to protect the preload content to tolerate reflow to the system platform. Techniques for data preload can include programming preload data into targeted blocks until the targeted blocks are programmed with the preload data and re-programming the preload data over the programmed preload data in the targeted blocks in a same set of memory cells, without an erase between programming and re-programming the preload data. Variations of such techniques can be used to prepare a memory device with preload data followed by performing a reflow of the memory device to a structure for an application to which the memory device is implemented.

公开(公告)号：US20250013716A1

公开(公告)日：2025-01-09

申请号：US18732881

申请日：2024-06-04

Applicant: Micron Technology, Inc.

Inventor： William Charles Filipiak ,  Jeremy M. Hirst

IPC: G06F17/16 ,  G06N5/04

Abstract: Systems, methods, and apparatus related to memory devices that perform matrix vector multiplication using memory cells. In one approach, a memory cell array has memory cells used to perform matrix vector multiplication based on summing output currents from the memory cells. A context of memory cells is determined by a controller (e.g., a memory controller internal or external to a memory chip having the array). The context can include, for example, a physical location of memory cells, weight patterns being programmed, and/or neighboring cell interference, etc. Based on the determined context, the controller dynamically determines adjustments (e.g., adjusted target threshold voltages or currents) for programming the memory cells to store weights prior to performing the matrix vector multiplication.

公开(公告)号：US20240331762A1

公开(公告)日：2024-10-03

申请号：US18428992

申请日：2024-01-31

Applicant: Micron Technology, Inc.

Inventor： William Charles Filipiak ,  Huai-Yuan Tseng

IPC: G11C11/4096 ,  G06F7/544 ,  G11C11/408

CPC classification number: G11C11/4096 ,  G06F7/5443 ,  G11C11/4085

Abstract: Systems, methods, and apparatus related to memory devices that perform multiplication using memory cells. In one approach, a memory cell array has memory cells used to perform matrix vector multiplication based on summing output currents from the memory cells. A context of the memory cell array is determined by a controller (e.g., a memory controller internal or external to a memory chip having the array). The context can include, for example, memory cell conditions related to data retention stress, quick charge loss, back-pattern effects, and/or cross-temperature variations. Based on the determined context, the controller dynamically determines adjustments to wordline and/or other memory cell bias voltages used during the multiplication.