公开(公告)号：US20200264984A1

公开(公告)日：2020-08-20

申请号：US16559031

申请日：2019-09-03

Applicant: Micron Technology, Inc.

Inventor： Lyle E. ADAMS ,  Sheng BI ,  Karl D. SCHUH ,  Pushpa SEETAMRAJU ,  Dan Z. TUPY ,  Yongcai XU

IPC: G06F12/1009

Abstract: An entry is read from a first memory component, the entry associated with a first logical address. The first entry includes a first physical address to a segment of a logical-to-physical address map in a second memory component and an indication of whether the segment of the logical-to-physical address map is stored in the first memory component. The segment of the logical-to-physical address map includes a second entry associated with the first logical address. A second physical address is written to the second entry in the first memory component based on a determination from the indication that the segment of the logical-to-physical address map is stored in the first memory component.

公开(公告)号：US20210182199A1

公开(公告)日：2021-06-17

申请号：US17185059

申请日：2021-02-25

Applicant: Micron Technology, Inc.

Inventor： Horia C. SIMIONESCU ,  Lyle E. ADAMS ,  Yongcai XU ,  Mark ISH

IPC: G06F12/0855

Abstract: A request to read data from a location associated with a memory component is received. The request is assigned a first tag, the first tag having a first identifier of a first buffer to store data read from the location. The request to read data is determined to collide with an earlier request to write data to the location. The earlier request is assigned a second tag, the second tag having a second identifier of a second buffer to store data to write to the location. An attempt to lock the second tag and the second buffer for the request to read data is made. The request to read data is fulfilled from the second buffer in response to a successful attempt to lock the second tag and the second buffer.