公开(公告)号：US11562273B2

公开(公告)日：2023-01-24

申请号：US16272851

申请日：2019-02-11

Applicant: Microsoft Technology Licensing, LLC

Inventor： Matthias Troyer ,  Helmut Gottfried Katzgraber ,  Christopher Anand Pattison

IPC: G06N7/00 ,  G06F17/11 ,  G06F7/58 ,  G06F9/38

Abstract: A computing device, including memory, an accelerator device, and a processor. The processor may generate a plurality of data packs that each indicate an update to a variable of one or more variables of a combinatorial cost function. The processor may transmit the plurality of data packs to the accelerator device. The accelerator device may, for each data pack, retrieve a variable value of the variable indicated by the data pack and generate an updated variable value. The accelerator device may generate an updated cost function value based on the updated variable value. The accelerator device may be further configured to determine a transition probability using a Monte Carlo algorithm and may store the updated variable value and the updated cost function value with the transition probability. The accelerator device may output a final updated cost function value to the processor.

公开(公告)号：US12093784B2

公开(公告)日：2024-09-17

申请号：US18351666

申请日：2023-07-13

Applicant: Microsoft Technology Licensing, LLC

Inventor： Poulami Das ,  Nicolas Guillaume Delfosse ,  Christopher Anand Pattison ,  Srilatha Manne ,  Douglas Carmean ,  Krysta Marie Svore ,  Helmut Gottfried Katzgraber

IPC: G06N10/00 ,  G06F9/30 ,  G06F9/38 ,  G06F9/50 ,  G06F18/2323 ,  G06N10/40 ,  G06N10/60 ,  G06N10/70 ,  G06N10/80 ,  H03M13/00 ,  H03M13/15

CPC classification number: G06N10/00 ,  G06F9/30098 ,  G06F9/30145 ,  G06F9/382 ,  G06F9/3861 ,  G06F9/3869 ,  G06F9/5016 ,  G06F18/2323 ,  G06N10/40 ,  G06N10/60 ,  G06N10/70 ,  G06N10/80 ,  H03M13/1575 ,  H03M13/611

Abstract: A quantum computing device comprises a surface code lattice that includes l logical qubits, where l is a positive integer. The surface code lattice is partitioned into two or more regions based on lattice geometry. A compression engine is coupled to each logical qubit of the l logical qubits. Each compression engine is configured to compress syndrome data generated by the surface code lattice using a geometry-based compression scheme. A decompression engine is coupled to each compression engine. Each decompression engine is configured to receive compressed syndrome data, decompress the received compressed syndrome data, and route the decompressed syndrome data to a decoder block.

公开(公告)号：US12073287B2

公开(公告)日：2024-08-27

申请号：US16687469

申请日：2019-11-18

Applicant: Microsoft Technology Licensing, LLC

Inventor： Poulami Das ,  Nicolas Guillaume Delfosse ,  Christopher Anand Pattison ,  Srilatha Manne ,  Douglas Carmean ,  Krysta Marie Svore ,  Helmut Gottfried Katzgraber

IPC: G06N10/00 ,  G06F9/30 ,  G06F9/38 ,  G06F9/50 ,  G06F18/2323 ,  G06N10/40 ,  G06N10/60 ,  G06N10/70 ,  G06N10/80 ,  H03M13/00 ,  H03M13/15

CPC classification number: G06N10/00 ,  G06F9/30098 ,  G06F9/30145 ,  G06F9/382 ,  G06F9/3861 ,  G06F9/3869 ,  G06F9/5016 ,  G06F18/2323 ,  G06N10/40 ,  G06N10/60 ,  G06N10/70 ,  G06N10/80 ,  H03M13/1575 ,  H03M13/611

Abstract: A quantum computing device comprises at least one quantum register including l logical qubits, where l is a positive integer. The quantum computing device further includes a set of d decoder blocks coupled to the at least one quantum register, where d

公开(公告)号：US11720071B2

公开(公告)日：2023-08-08

申请号：US17815541

申请日：2022-07-27

Applicant: Microsoft Technology Licensing, LLC

Inventor： Damian Silvio Steiger ,  Helmut Gottfried Katzgraber ,  Matthias Troyer ,  Christopher Anand Pattison

IPC: G05B13/04 ,  G06F30/25 ,  G06F111/10

CPC classification number: G05B13/042 ,  G06F30/25 ,  G06F2111/10

Abstract: A computing device is provided, including memory storing a cost function of a plurality of variables. The computing device may further include a processor configured to, for a stochastic simulation algorithm, compute a control parameter upper bound. The processor may compute a control parameter lower bound. The processor may compute a plurality of intermediate control parameter values within a control parameter range between the control parameter lower bound and the control parameter upper bound. The processor may compute an estimated minimum or an estimated maximum of the cost function using the stochastic simulation algorithm with the control parameter upper bound, the control parameter lower bound, and the plurality of intermediate control parameter values. A plurality of copies of the cost function may be simulated with a respective plurality of seed values.

公开(公告)号：US11630703B2

公开(公告)日：2023-04-18

申请号：US16743386

申请日：2020-01-15

Applicant: Microsoft Technology Licensing, LLC

Inventor： Christopher Anand Pattison ,  Helmut Gottfried Katzgraber ,  Matthias Troyer

IPC: G06N5/02 ,  G06N5/00 ,  G06F9/50 ,  G06N7/00 ,  G06F17/11

Abstract: A computing device is provided, including a cluster update accelerator circuit configured to receive signals encoding a combinatorial cost function of a plurality of variables and a connectivity graph for the combinatorial cost function. In an energy sum phase, the cluster update accelerator circuit may determine a respective plurality of accumulated energy change values for the combinatorial cost function based at least in part on the connectivity graph. In an update phase, the cluster update accelerator circuit may determine a respective update indicator bit for each accumulated energy change value. In an encoder phase, based on the plurality of update indicator bits, the cluster update accelerator circuit may select a largest update-indicated cluster of the variables included in the connectivity graph. The cluster update accelerator circuit may output an instruction to update the variables included in the largest update-indicated cluster.

公开(公告)号：US11521104B2

公开(公告)日：2022-12-06

申请号：US17179625

申请日：2021-02-19

Applicant: Microsoft Technology Licensing, LLC

Inventor： Nicolas Guillaume Delfosse ,  Christopher Anand Pattison ,  Michael Beverland ,  Marcus Palmer Da Silva

IPC: G06N10/00 ,  G06F11/10 ,  G06F11/00 ,  G06F16/901

Abstract: A quantum computing system computes soft information quantifying an effect of soft noise on multiple rounds of a syndrome measurement that is output by a quantum measurement circuit. The soft noise arises due to imperfections in a readout device that introduce variability in repeated measurements of ancilla qubits and is distinct from quantum noise arising from bit-flips in data qubits that are indirectly measured by the ancilla qubits. The quantum computing system applying decoding logic to identify fault locations within the quantum measurement circuit based on the computed soft information.

公开(公告)号：US11922337B2

公开(公告)日：2024-03-05

申请号：US18157339

申请日：2023-01-20

Applicant: Microsoft Technology Licensing, LLC

Inventor： Matthias Troyer ,  Helmut Gottfried Katzgraber ,  Christopher Anand Pattison

IPC: G06N7/01 ,  G06F7/58 ,  G06F9/38 ,  G06F17/11

CPC classification number: G06N7/01 ,  G06F7/582 ,  G06F9/3877 ,  G06F17/11

Abstract: A computing device, including memory, an accelerator device, and a processor. The processor may generate a plurality of data packs that each indicate an update to a variable of one or more variables of a combinatorial cost function. The processor may transmit the plurality of data packs to the accelerator device. The accelerator device may, for each data pack, retrieve a variable value of the variable indicated by the data pack and generate an updated variable value. The accelerator device may generate an updated cost function value based on the updated variable value. The accelerator device may be further configured to determine a transition probability using a Monte Carlo algorithm and may store the updated variable value and the updated cost function value with the transition probability. The accelerator device may output a final updated cost function value to the processor.

公开(公告)号：US11755941B2

公开(公告)日：2023-09-12

申请号：US17818137

申请日：2022-08-08

Applicant: Microsoft Technology Licensing, LLC

Inventor： Poulami Das ,  Nicolas Guillaume Delfosse ,  Christopher Anand Pattison ,  Srilatha Manne ,  Douglas Carmean ,  Krysta Marie Svore ,  Helmut Gottfried Katzgraber

IPC: G06N10/00 ,  G06F9/30 ,  G06F9/38 ,  G06F9/50 ,  G06N10/60 ,  G06N10/40 ,  G06N10/80 ,  G06N10/70 ,  H03M13/15 ,  H03M13/00 ,  G06F18/2323

CPC classification number: G06N10/00 ,  G06F9/30098 ,  G06F9/30145 ,  G06F9/382 ,  G06F9/3861 ,  G06F9/3869 ,  G06F9/5016 ,  G06F18/2323 ,  G06N10/40 ,  G06N10/60 ,  G06N10/70 ,  G06N10/80 ,  H03M13/1575 ,  H03M13/611

Abstract: A quantum computing device comprises a surface code lattice that includes l logical qubits, where l is a positive integer. The surface code lattice is partitioned into two or more regions based on lattice geometry. A compression engine is coupled to each logical qubit of the l logical qubits. Each compression engine is configured to compress syndrome data generated by the surface code lattice using a geometry-based compression scheme. A decompression engine is coupled to each compression engine. Each decompression engine is configured to receive compressed syndrome data, decompress the received compressed syndrome data, and route the decompressed syndrome data to a decoder block.

公开(公告)号：US11410070B2

公开(公告)日：2022-08-09

申请号：US16687517

申请日：2019-11-18

Applicant: Microsoft Technology Licensing, LLC

Inventor： Poulami Das ,  Nicolas Guillaume Delfosse ,  Christopher Anand Pattison ,  Srilatha Manne ,  Douglas Carmean ,  Krysta Marie Svore ,  Helmut Gottfried Katzgraber

IPC: G06N10/00 ,  G06F9/38 ,  G06K9/62 ,  G06F9/30 ,  G06F9/50

Abstract: A quantum computing device comprises at least one quantum register including a plurality of logical qubits. A compression engine is coupled to each logical qubit of the plurality of logical qubits. Each compression engine is configured to compress syndrome data. A decompression engine is coupled to each compression engine. Each decompression engine is configured to receive compressed syndrome data, decompress the received compressed syndrome data, and route the decompressed syndrome data to a decoder block.