Customized integrated circuit for serial comparison of nucleotide sequences

    公开(公告)号:US10566076B2

    公开(公告)日:2020-02-18

    申请号:US15349725

    申请日:2016-11-11

    Abstract: Comparisons between two nucleotide sequences can be performed by customized integrated circuitry that can implement a Smith Waterman analysis in series, as opposed to the parallel implementations known in the art. Series performance enables such customized integrated circuitry to take advantage of optimizations, including enveloping thresholds that demarcate between cells of a two-dimensional matrix for which nucleotide comparisons are to be performed, and cells of the two-dimensional matrix for which no such comparison need be performed, and, instead, a value of zero can simply be entered. Additionally, such customized integrated circuitry facilitates the combination of multiple control units, each directing the comparison of a unique pair of nucleotides, with a single calculation engine that can generate values for individual cells of the two-dimensional matrices by which such pairs of nucleotides are compared.

    Reduced memory nucleotide sequence comparison

    公开(公告)号:US10241970B2

    公开(公告)日:2019-03-26

    申请号:US15351372

    申请日:2016-11-14

    Abstract: Comparisons between two nucleotide sequences can be performed by customized integrated circuitry that can implement a Smith Waterman analysis in a reduced memory footprint, storing and referencing only individual portions, or subsections, of a two-dimensional matrix that is representative of the comparison between the two nucleotide sequences. As the backtracking proceeds, backtracking metadata corresponding to a cell from a subsection that is not currently retained in memory can be required. Such a subsection can be regenerated from previously generated scores associated with checkpoint cells of the two-dimensional matrix that comprise two edges of the subsection being regenerated. Moreover, to further reduce memory consumption, the backtracking metadata stored for each cell can comprise four binary digits: two indicative of a directional assignment, one indicative of whether the corresponding cell is part of a deletion stretching across multiple contiguous cells, and one analogously indicative of insertions stretching across multiple contiguous cells.

    IN-LINE NETWORK ACCELERATOR
    3.
    发明申请

    公开(公告)号:US20170250914A1

    公开(公告)日:2017-08-31

    申请号:US15595925

    申请日:2017-05-15

    Abstract: A smart NIC (Network Interface Card) is provided with features to enable the smart NIC to operate as an in-line NIC between a host's NIC and a network. The smart NIC provides pass-through transmission of network flows for the host. Packets sent to and from the host pass through the smart NIC. As a pass-through point, the smart NIC is able to accelerate the performance of the pass-through network flows by analyzing packets, inserting packets, dropping packets, inserting or recognizing congestion information, and so forth. In addition, the smart NIC provides a lightweight transport protocol (LTP) module that enables it to establish connections with other smart NICs. The LTP connections allow the smart NICs to exchange data without passing network traffic through their respective hosts.

    DEEP NEURAL NETWORK PROCESSING ON HARDWARE ACCELERATORS WITH STACKED MEMORY
    4.
    发明申请
    DEEP NEURAL NETWORK PROCESSING ON HARDWARE ACCELERATORS WITH STACKED MEMORY 审中-公开
    具有堆叠存储器的硬件​​加速器的深层神经网络处理

    公开(公告)号:US20160379115A1

    公开(公告)日:2016-12-29

    申请号:US14754344

    申请日:2015-06-29

    Abstract: A method is provided for processing on an acceleration component a deep neural network. The method includes configuring the acceleration component to perform forward propagation and backpropagation stages of the deep neural network. The acceleration component includes an acceleration component die and a memory stack disposed in an integrated circuit package. The memory stack has a memory bandwidth greater than about 50 GB/sec and a power efficiency of greater than about 20 MB/sec/mW.

    Abstract translation: 提供了一种用于对深度神经网络的加速度分量进行处理的方法。 该方法包括配置加速度分量以执行深层神经网络的向前传播和反向传播阶段。 加速度分量包括设置在集成电路封装中的加速度分量芯片和存储器堆叠。 存储器堆栈具有大于约50GB /秒的存储器带宽和大于约20MB / sec / mW的功率效率。

    CONVOLUTIONAL NEURAL NETWORKS ON HARDWARE ACCELERATORS

    公开(公告)号:US20190311253A1

    公开(公告)日:2019-10-10

    申请号:US16440948

    申请日:2019-06-13

    Abstract: A hardware acceleration component is provided for implementing a convolutional neural network. The hardware acceleration component includes an array of N rows and M columns of functional units, an array of N input data buffers configured to store input data, and an array of M weights data buffers configured to store weights data. Each of the N input data buffers is coupled to a corresponding one of the N rows of functional units. Each of the M weights data buffers is coupled to a corresponding one of the M columns of functional units. Each functional unit in a row is configured to receive a same set of input data. Each functional unit in a column is configured to receive a same set of weights data from the weights data buffer coupled to the row. Each of the functional units is configured to perform a convolution of the received input data and the received weights data, and the M columns of functional units are configured to provide M planes of output data.

    In-line network accelerator
    6.
    发明授权

    公开(公告)号:US09674090B2

    公开(公告)日:2017-06-06

    申请号:US14752734

    申请日:2015-06-26

    Abstract: A smart NIC (Network Interface Card) is provided with features to enable the smart NIC to operate as an in-line NIC between a host's NIC and a network. The smart NIC provides pass-through transmission of network flows for the host. Packets sent to and from the host pass through the smart NIC. As a pass-through point, the smart NIC is able to accelerate the performance of the pass-through network flows by analyzing packets, inserting packets, dropping packets, inserting or recognizing congestion information, and so forth. In addition, the smart NIC provides a lightweight transport protocol (LTP) module that enables it to establish connections with other smart NICs. The LTP connections allow the smart NICs to exchange data without passing network traffic through their respective hosts.

    IN-LINE NETWORK ACCELERATOR
    7.
    发明申请
    IN-LINE NETWORK ACCELERATOR 有权
    在线网络加速器

    公开(公告)号:US20160380896A1

    公开(公告)日:2016-12-29

    申请号:US14752734

    申请日:2015-06-26

    Abstract: A smart NIC (Network Interface Card) is provided with features to enable the smart NIC to operate as an in-line NIC between a host's NIC and a network. The smart NIC provides pass-through transmission of network flows for the host. Packets sent to and from the host pass through the smart NIC. As a pass-through point, the smart NIC is able to accelerate the performance of the pass-through network flows by analyzing packets, inserting packets, dropping packets, inserting or recognizing congestion information, and so forth. In addition, the smart NIC provides a lightweight transport protocol (LTP) module that enables it to establish connections with other smart NICs. The LTP connections allow the smart NICs to exchange data without passing network traffic through their respective hosts.

    Abstract translation: 智能NIC(网络接口卡)提供了功能,使智能NIC能够作为主机NIC和网络之间的串联NIC进行操作。 智能NIC为主机提供网络流的传递传输。 从主机发送的数据包通过智能NIC。 作为传递点,智能NIC能够通过分析数据包,插入数据包,丢弃数据包,插入或识别拥塞信息等来加速传递网络流的性能。 此外,智能NIC还提供了轻量级的传输协议(LTP)模块,使其能够与其他智能NIC建立连接。 LTP连接允许智能NIC交换数据,而不会通过其各自的主机传递网络流量。

    System for training an artificial neural network

    公开(公告)号:US12190235B2

    公开(公告)日:2025-01-07

    申请号:US17163299

    申请日:2021-01-29

    Abstract: Embodiments of the present disclosure include a system for optimizing an artificial neural network by configuring a model, based on a plurality of training parameters, to execute a training process, monitoring a plurality of statistics produced upon execution of the training process, and adjusting one or more of the training parameters, based on one or more of the statistics, to maintain at least one of the statistics within a predetermined range. In some embodiments, artificial intelligence (AI) processors may execute a training process on a model, the training process having an associated set of training parameters. Execution of the training process may produce a plurality of statistics. Control processor(s) coupled to the AI processor(s) may receive the statistics, and in accordance therewith, adjust one or more of the training parameters to maintain at least one of the statistics within a predetermined range during execution of the training process.

    SYSTEM FOR TRAINING AN ARTIFICIAL NEURAL NETWORK

    公开(公告)号:US20220245444A1

    公开(公告)日:2022-08-04

    申请号:US17163299

    申请日:2021-01-29

    Abstract: Embodiments of the present disclosure include a system for optimizing an artificial neural network by configuring a model, based on a plurality of training parameters, to execute a training process, monitoring a plurality of statistics produced upon execution of the training process, and adjusting one or more of the training parameters, based on one or more of the statistics, to maintain at least one of the statistics within a predetermined range. In some embodiments, artificial intelligence (AI) processors may execute a training process on a model, the training process having an associated set of training parameters. Execution of the training process may produce a plurality of statistics. Control processor(s) coupled to the AI processor(s) may receive the statistics, and in accordance therewith, adjust one or more of the training parameters to maintain at least one of the statistics within a predetermined range during execution of the training process.

    Lightweight transport protocol
    10.
    发明授权

    公开(公告)号:US10455061B2

    公开(公告)日:2019-10-22

    申请号:US15849609

    申请日:2017-12-20

    Abstract: A smart NIC (Network Interface Card) is provided with features to enable the smart NIC to operate as an in-line NIC between a host's NIC and a network. The smart NIC provides pass-through transmission of network flows for the host. Packets sent to and from the host pass through the smart NIC. As a pass-through point, the smart NIC is able to accelerate the performance of the pass-through network flows by analyzing packets, inserting packets, dropping packets, inserting or recognizing congestion information, and so forth. In addition, the smart NIC provides a lightweight transport protocol (LTP) module that enables it to establish connections with other smart NICs. The LTP connections allow the smart NICs to exchange data without passing network traffic through their respective hosts.

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