摘要:
A distributed clipping scheme is provided, view frustum culling is distributed in several places in a graphics processing pipeline to simplify hardware implementation and improve performance. In general, many 3D objects are outside viewing frustum. In one embodiment, clipping is performed on these objects with a simple algorithm in the PA module, such as near Z clipping, trivial rejection and trivial acceptance. In one embodiment, the SE and RA modules perform the rest of clipping, such as X, Y and far Z clipping. In one embodiment, the SE module performs clipping by way of computing a initial point of rasterization. In one embodiment, the RA module performs clipping by way of conducting the rendering step of the rasterization process. This approach distributes the complexity in the graphics processing pipeline and makes the design simpler and faster, therefore design complexity, cost and performance may all be improved in hardware implementation.
摘要:
A hierarchical tile-based rasterization method is disclosed. The inventive rasterization algorithm rasterizes pixels in hierarchical rectangles or blocks. The method includes: walking a plurality of tiles of pixels and determining if each tile is valid; breaking each valid tile into a plurality of subtiles and determining if each subtile is valid; breaking each valid subtile into a plurality of quads and determining if each quad is valid; and rendering pixels for each valid quad. These hierarchical levels of block validations are performed in parallel. The inventive rasterization algorithm is further implemented in hardware for better performance.
摘要:
A distributed clipping scheme is provided, view frustum culling is distributed in several places in a graphics processing pipeline to simplify hardware implementation and improve performance. In general, many 3D objects are outside viewing frustum. In one embodiment, clipping is performed on these objects with a simple algorithm in the PA module, such as near Z clipping, trivial rejection and trivial acceptance. In one embodiment, the SE and RA modules perform the rest of clipping, such as X, Y and far Z clipping. In one embodiment, the SE module performs clipping by way of computing a initial point of rasterization. In one embodiment, the RA module performs clipping by way of conducting the rendering step of the rasterization process. This approach distributes the complexity in the graphics processing pipeline and makes the design simpler and faster, therefore design complexity, cost and performance may all be improved in hardware implementation.
摘要:
An apparatus and method to dynamically regulate system bandwidth in a graphics system includes receiving vertex data from an application by way of an application programming interface. The rate that the vertex data is received from the application is then determined. In the event the rate is greater than a selected threshold, the graphics system is configured to operate in immediate mode, wherein vertex data is rendered immediately upon reception. In the event the rate is less than the selected threshold, the graphics system is configured to operate in retained mode, wherein vertex data is stored prior to being rendered. The apparatus and method switches between each of the modes on-the-fly in a manner that is transparent to the application.
摘要:
An apparatus and method for rasterizing a primitive in a graphics system is disclosed in one example of the invention as including scanning a first row of tiles, one tile at a time, starting from a first point and scanning in a first direction. Immediately after scanning the first row of tiles, the method includes moving from the first point to a second point in an orthogonal direction relative to the first row. Immediately after moving from the first point to the second point, the method includes scanning a second row of tiles, one tile at a time, starting from the second point and scanning in the first direction. By scanning rows in the same direction immediately prior to and after moving from one row to another, cache utilization is improved.
摘要:
A system to facilitate virtual page translation. An embodiment of the system includes a processing device, a front end unit, and address translation logic. The processing device is configured to process data of a current block of data. The front end unit is coupled to the processing device. The front end unit is configured to access the current block of data in an electronic memory device and to send the current block of data to the processor for processing. The address translation logic is coupled to the front end unit and the electronic memory device. The address translation logic is configured to pre-fetch a virtual address translation for a predicted virtual address based on a virtual address of the current block of data. Embodiments of the system increase address translation performance of computer systems including graphic rendering operations.
摘要:
In one embodiment, the invention is a method. The method includes receiving a request at a primary device to play an audio file, where the primary device is in a power saving state. The method also includes accessing a storage location on the primary device. The method further includes locating a play list which has a record of the audio file. Moreover, the method includes choosing the audio file from the play list and playing the audio file.
摘要:
An apparatus and method for rasterizing a primitive in a graphics system is disclosed in one example of the invention as including scanning a first row of tiles, one tile at a time, starting from a first point and scanning in a first direction. Immediately after scanning the first row of tiles, the method includes moving from the first point to a second point in an orthogonal direction relative to the first row. Immediately after moving from the first point to the second point, the method includes scanning a second row of tiles, one tile at a time, starting from the second point and scanning in the first direction. By scanning rows in the same direction immediately prior to and after moving from one row to another, cache utilization is improved.
摘要:
An apparatus and method to dynamically regulate system bandwidth in a graphics system includes receiving vertex data from an application by way of an application programming interface. The rate that the vertex data is received from the application is then determined. In the event the rate is greater than a selected threshold, the graphics system is configured to operate in immediate mode, wherein vertex data is rendered immediately upon reception. In the event the rate is less than the selected threshold, the graphics system is configured to operate in retained mode, wherein vertex data is stored prior to being rendered. The apparatus and method switches between each of the modes on-the-fly in a manner that is transparent to the application.
摘要:
An apparatus and method for rasterizing a primitive in a graphics system is disclosed in one example of the invention as including scanning a first row of tiles, one tile at a time, starting from a first point and scanning in a first direction. Immediately after scanning the first row of tiles, the method includes moving from the first point to a second point in an orthogonal direction relative to the first row. Immediately after moving from the first point to the second point, the method includes scanning a second row of tiles, one tile at a time, starting from the second point and scanning in the first direction. By scanning rows in the same direction immediately prior to and after moving from one row to another, cache utilization is improved.