公开(公告)号：US06972601B2

公开(公告)日：2005-12-06

申请号：US10627855

申请日：2003-07-25

申请人： Min-su Kim

发明人： Min-su Kim

IPC分类号： G01R19/00 ,  G11C7/06 ,  H03F3/45 ,  H03K3/356

CPC分类号： H03K3/356191 ,  G11C7/062 ,  H03K3/356182

摘要： A sense amplifier having a synchronous reset capability or an asynchronous reset capability, which is readily implemented and has high speed, is provided. The sense amplifier includes a first sense-amplifying unit which sense-amplifies an input signal in response to a clock signal and generates an output signal, and a second sense-amplifying unit which sense-amplifies a complementary signal of the input signal in response to the clock signal and generates a complementary signal of the output signal. The sense amplifier further includes a first controller which is connected to the first sense-amplifying unit and sets the output signal in response to a reset signal and an inverted signal of the reset signal, and a second controller which is connected to the second sense-amplifying unit and resets the complementary signal of the output signal in response to the reset signal and the inverted signal of the reset signal.

摘要翻译： 提供具有同步复位能力或异步复位能力的读出放大器，其易于实现并且具有高速度。 感测放大器包括：第一感测放大单元，其响应于时钟信号来感测放大输入信号并产生输出信号;以及第二感测放大单元，其响应于所述输入信号而对输入信号的互补信号进行感测放大 时钟信号并产生输出信号的互补信号。 感测放大器还包括第一控制器，其连接到第一感测放大单元，并且响应于复位信号和复位信号的反相信号设置输出信号;以及第二控制器，其连接到第二感测放大单元， 放大单元，并且响应于复位信号和复位信号的反相信号复位输出信号的互补信号。

公开(公告)号：US20050225372A1

公开(公告)日：2005-10-13

申请号：US11095187

申请日：2005-03-31

申请人： Min-su Kim

发明人： Min-su Kim

IPC分类号： H03K3/3562 ,  H03K3/012 ,  H03K3/037 ,  H03K3/289 ,  H03K3/356 ,  H03K5/1532 ,  H03K19/096 ,  H03K19/20

CPC分类号： H03K3/012 ,  H03K3/356121 ,  H03K3/356191 ,  H03K19/20

摘要： In high-speed flip-flops and complex gates using the same, the flip-flop includes a first PMOS transistor and second and third NMOS transistors, which are serially connected between a power supply voltage and a ground voltage. Gates of the first PMOS transistor and the second NMOS transistor are connected to input data. A gate of the third NMOS transistor is connected to a clock pulse signal. A logic level of a first intermediate node between the first PMOS transistor and the second NMOS transistor is latched by a first latch. The flip-flop further includes a fourth PMOS transistor and fifth and sixth NMOS transistors, which are serially connected between a power supply voltage and a ground voltage. Gates of the fourth PMOS transistor and the fifth NMOS transistor are connected to the first intermediate node. A gate of the sixth NMOS transistor is connected to the clock pulse signal. A logic level of a second intermediate node between the fourth PMOS transistor and the fifth NMOS transistor is latched by a second latch. Accordingly, intermediate nodes of the flip-flops are connected to ground voltages via two NMOS transistors upon logic level switching, rather than three or more, so that the switching time of the device is shortened.

摘要翻译： 在使用其的高速触发器和复合栅极中，触发器包括串联连接在电源电压和接地电压之间的第一PMOS晶体管和第二和第三NMOS晶体管。 第一PMOS晶体管和第二NMOS晶体管的栅极连接到输入数据。 第三NMOS晶体管的栅极连接到时钟脉冲信号。 第一PMOS晶体管和第二NMOS晶体管之间的第一中间节点的逻辑电平由第一锁存器锁存。 触发器还包括串联连接在电源电压和接地电压之间的第四PMOS晶体管和第五和第六NMOS晶体管。 第四PMOS晶体管和第五NMOS晶体管的栅极连接到第一中间节点。 第六个NMOS晶体管的栅极连接到时钟脉冲信号。 第四PMOS晶体管和第五NMOS晶体管之间的第二中间节点的逻辑电平由第二锁存器锁存。 因此，触发器的中间节点在逻辑电平切换而不是三个或更多时通过两个NMOS晶体管连接到接地电压，从而缩短了器件的切换时间。

公开(公告)号：US08463201B2

公开(公告)日：2013-06-11

申请号：US13151815

申请日：2011-06-02

申请人： Sung-chan Jung ,  Youngoo Yang ,  Min-su Kim

发明人： Sung-chan Jung ,  Youngoo Yang ,  Min-su Kim

IPC分类号： H04B1/04

CPC分类号： H04B1/525

摘要： An apparatus and method for removing a transmission leakage signal from a radio frequency identification (RFID) reader are provided. The apparatus includes a removing unit having a device of a large impedance and a phase shifter capable of a wide range phase change with respect to a leakage signal, thereby optimally removing the transmission leakage signal irrespective of a change in the frequency characteristics and a change in the length of a cable.

摘要翻译： 提供了一种用于从射频识别（RFID）读取器去除传输泄漏信号的装置和方法。 该装置包括具有大阻抗的装置的去除单元和能够相对于泄漏信号进行宽范围相位变化的移相器，从而最佳地消除了传输泄漏信号，而不管频率特性的变化和变化 电缆的长度。

公开(公告)号：US20080061853A1

公开(公告)日：2008-03-13

申请号：US11926664

申请日：2007-10-29

申请人： Min-su Kim

发明人： Min-su Kim

IPC分类号： H03K3/356 ,  H03K19/0175

CPC分类号： H03K3/012 ,  H03K3/356121 ,  H03K3/356191 ,  H03K19/20

摘要： In high-speed flip-flops and complex gates using the same, the flip-flop includes a first PMOS transistor and second and third NMOS transistors, which are serially connected between a power supply voltage and a ground voltage. Gates of the first PMOS transistor and the second NMOS transistor are connected to input data. A gate of the third NMOS transistor is connected to a clock pulse signal. A logic level of a first intermediate node between the first PMOS transistor and the second NMOS transistor is latched by a first latch. The flip-flop further includes a fourth PMOS transistor and fifth and sixth NMOS transistors, which are serially connected between a power supply voltage and a ground voltage. Gates of the fourth PMOS transistor and the fifth NMOS transistor are connected to the first intermediate node. A gate of the sixth NMOS transistor is connected to the clock pulse signal. A logic level of a second intermediate node between the fourth PMOS transistor and the fifth NMOS transistor is latched by a second latch. Accordingly, intermediate nodes of the flip-flops are connected to ground voltages via two NMOS transistors upon logic level switching, rather than three or more, so that the switching time of the device is shortened.

公开(公告)号：US20070197265A1

公开(公告)日：2007-08-23

申请号：US11708354

申请日：2007-02-21

申请人： Jin-soo Park ,  Min-su Kim

发明人： Jin-soo Park ,  Min-su Kim

IPC分类号： H04B1/16 ,  H04B1/38 ,  H04M1/00

CPC分类号： H03K3/35613

摘要： A level shifter includes a level shifting circuit which receives input signal from a function block and changes the voltage level of the input signal, to output an output signal; a current blocking circuit, which suppresses current flowing to the level shifting circuit in an input suppression mode in which power supplied to the function block is cut and deactivates the level shifting circuit; and an output control circuit, which controls the output signal of the level shifting circuit to have a direct current (DC) voltage level in the input suppression mode.

摘要翻译： 电平移位器包括电平移位电路，其接收来自功能块的输入信号并改变输入信号的电压电平，以输出输出信号; 电流阻塞电路，其抑制在输入抑制模式中流向电平移位电路的电流，其中提供给功能块的功率被切断并且使电平移位电路停用; 以及输出控制电路，其控制电平移位电路的输出信号在输入抑制模式下具有直流（DC）电压电平。

公开(公告)号：US07247261B2

公开(公告)日：2007-07-24

申请号：US10699138

申请日：2003-10-30

申请人： Jung Yun Do ,  Seung Koo Park ,  Jung Jin Ju ,  Suntak Park ,  Min-su Kim ,  Myung Hyun Lee

发明人： Jung Yun Do ,  Seung Koo Park ,  Jung Jin Ju ,  Suntak Park ,  Min-su Kim ,  Myung Hyun Lee

IPC分类号： G02B5/23 ,  C08F283/01 ,  C08F283/08 ,  F21V9/00

CPC分类号： C08F290/00 ,  C08F283/00 ,  C08G83/003

摘要： The present invention relates to a non-linear optical material having a dendrimer structure; and, more particularly, to a non-linear optical material having organic chromophores at the ends and formed based on ester linkages and/or ether linkages. Since the non-linear optical material of the present invention is formed based on ester linkages and/or ether linkages, it is very stable. Also, because it is a dendrimer structure, it has the properties of a polymer while having a strong connection ability at the ends, and this makes the non-linear optical material easily adopt organic chromophores easily. As it is stable thermally and optically, it can be applied to optical communication usefully.

摘要翻译： 本发明涉及具有树枝状大分子结构的非线性光学材料; 更具体地说，涉及在端部具有有机发色团并基于酯键和/或醚键形成的非线性光学材料。 由于本发明的非线性光学材料是基于酯键和/或醚键形成的，所以非常稳定。 此外，由于它是树枝状聚合物结构，它具有聚合物的性质，同时在端部具有强连接能力，这使得非线性光学材料容易地容易地采用有机发色团。 由于它是热和光学稳定的，它可以有效地应用于光学通信。

公开(公告)号：US08400234B2

公开(公告)日：2013-03-19

申请号：US12827074

申请日：2010-06-30

申请人： Young-goo Yang ,  Min-su Kim ,  Sung-chan Jung

发明人： Young-goo Yang ,  Min-su Kim ,  Sung-chan Jung

IPC分类号： H01P5/12 ,  H04B1/10

CPC分类号： H04B1/525

摘要： An apparatus for removing a leakage signal includes a coupler including a transmission port through which a transmission signal is input, an antenna port through which the transmission signal is output to an antenna and a receiving signal is input from the antenna, and a receiving port through which the receiving signal is output; and a removing unit which outputs, to the receiving port, a leakage removing signal having a same magnitude as one of or a sum of a magnitude of a first leakage signal of the transmission signal, which is generated at the transmission port and input to the receiving port, and a magnitude of a second leakage signal of the transmission signal which is input to the receiving port through the antenna port, the leakage removing signal having an opposite phase to one of the phases or an aggregate phase of the first and second leakage signals.

摘要翻译： 一种用于去除泄漏信号的装置包括耦合器，该耦合器包括传输信号被输入的传输端口，传输信号被输出到天线的天线端口和从天线输入的接收信号，以及接收端口 输出接收信号; 以及去除单元，其向所述接收端口输出具有与所述传输端口处生成的并且输入到所述传输信号的所述传输信号的第一泄漏信号的大小之和相等的大小的泄漏消除信号 接收端口和通过天线端口输入到接收端口的发送信号的第二泄漏信号的大小，该泄漏消除信号具有与一个相位相反的相位或第一和第二泄漏的聚集相位 信号。

公开(公告)号：US20120146954A1

公开(公告)日：2012-06-14

申请号：US13301813

申请日：2011-11-22

申请人： Suntak PARK ,  Seung Koo Park ,  Jung Jin Ju ,  Min-su Kim ,  Jin Tae Kim ,  Ki Uk Kyung

发明人： Suntak PARK ,  Seung Koo Park ,  Jung Jin Ju ,  Min-su Kim ,  Jin Tae Kim ,  Ki Uk Kyung

IPC分类号： G06F3/042

CPC分类号： G06F3/0421

摘要： Disclosed is an optical touch screen panel including: a light source unit to generate light parallel with a horizontal axis or a vertical axis of a touch screen; a first beam deflector to increase the width of the light parallel with the horizontal axis to be matched with the width of the horizontal-axis of the touch screen, or increase the width of the parallel light parallel with the vertical axis to be matched with the width of the vertical-axis of the touch screen in order to reflect the parallel light having the increased width; a second beam deflector to reduce the width of the parallel light incident from the first beam deflector in order to reflect the parallel light having the reduced width; and a photodetector unit to sense a touched position of an object on the horizontal-axis or the vertical-axis of the touch screen.

摘要翻译： 公开了一种光学触摸屏面板，包括：光源单元，用于产生与触摸屏的水平轴或垂直轴平行的光; 第一光束偏转器，用于增加与水平轴平行的光的宽度以与触摸屏的水平轴的宽度相匹配，或者增加与垂直轴平行的平行光的宽度，使其与 为了反射具有增加的宽度的平行光，触摸屏的垂直轴的宽度; 第二光束偏转器，用于减小从第一光束偏转器入射的平行光的宽度，以便反射具有减小的宽度的平行光; 以及光电检测器单元，用于感测物体在触摸屏的水平轴或垂直轴上的触摸位置。

公开(公告)号：US07843243B2

公开(公告)日：2010-11-30

申请号：US12222481

申请日：2008-08-11

申请人： Min-su Kim

发明人： Min-su Kim

IPC分类号： H03K3/289 ,  H03K3/356

CPC分类号： H03K3/356139

摘要： Example embodiments relate to an electronic circuit, for example, a flip-flop circuit, a pipeline circuit including the flip-flop circuit and a method for operating the flip-flop circuit. A flip-flop circuit may include a precharge transistor configured to precharge an internal node to a first power supply voltage in response to a clock signal, a first pull-down unit configured to pull down a voltage of the internal node to a second power supply voltage, a pull-up transistor configured to pull up a voltage of an output node to the first power supply voltage in response to the voltage of the internal node, and a second pull-down unit configured to pull down the voltage of the output node to the second power supply voltage. The pipeline circuit may include a pulse generating circuit, a first flip-flop group, a combination logic circuit, and a second flip-flop group. A method for operating a flip-flop circuit may include precharging an internal node to a first power supply voltage in response to a clock signal, pulling down a voltage of the internal node, pulling down the voltage to a second power supply voltage in response to a first pulse signal, and pulling up a voltage of an output node to the first power supply voltage.

摘要翻译： 示例性实施例涉及电子电路，例如触发器电路，包括触发器电路的流水线电路和用于操作触发器电路的方法。 触发器电路可以包括预充电晶体管，其被配置为响应于时钟信号而将内部节点预充电到第一电源电压;第一下拉单元，被配置为将内部节点的电压下拉到第二电源 电压，上拉晶体管，其被配置为响应于所述内部节点的电压将输出节点的电压上拉到所述第一电源电压;以及第二下拉单元，被配置为下拉所述输出节点的电压 到第二个电源电压。 流水线电路可以包括脉冲发生电路，第一触发器组，组合逻辑电路和第二触发器组。 用于操作触发器电路的方法可以包括响应于时钟信号将内部节点预充电到第一电源电压，拉下内部节点的电压，响应于第二电源电压将电压拉低到第二电源电压 第一脉冲信号，并将输出节点的电压提升到第一电源电压。

公开(公告)号：US20080080824A1

公开(公告)日：2008-04-03

申请号：US11857262

申请日：2007-09-18

申请人： Suntak Park ,  Seok Ho Song ,  Hyong Sik Won ,  Myung-Hyun Lee ,  Jung Jin Ju ,  Min-su Kim ,  Jin Tae Kim ,  Seung Koo Park

发明人： Suntak Park ,  Seok Ho Song ,  Hyong Sik Won ,  Myung-Hyun Lee ,  Jung Jin Ju ,  Min-su Kim ,  Jin Tae Kim ,  Seung Koo Park

IPC分类号： G02B6/036

CPC分类号： G02B6/1226 ,  B82Y20/00

摘要： Provided is an optical waveguide device including: a core having a stacked structure of at least three layers in which first thin films having a finite width and thickness and formed of a material having a relatively high electric conductivity and a second thin film having the same width as the first thin films and formed of a material having a lower conductivity than the material forming the first thin films are stacked in sequence, the first thin films being disposed in a first layer and an uppermost layer and adjacent to each other for interaction of surface plasmons; and a clad disposed around the core and formed of a material having a lower conductivity than the material forming the first thin films and a higher refractive index than the material forming the second thin film. The thin metal films of at least two layers having a high electric conductivity in the optical waveguide device can generate a combined surface plasmon mode and propagate the generated surface plasmon mode in the length direction of the thin metal films. Thus, a propagated signal suffers from a smaller propagation loss than a surface plasmon mode supported by a single thin film.

摘要翻译： 本发明提供一种光波导装置，其特征在于，包括：具有层叠结构的至少3层的芯，其中具有有限宽度和厚度的第一薄膜由具有较高导电性的材料形成，并且具有相同宽度的第二薄膜 因为第一薄膜并且由具有比形成第一薄膜的材料的导电性低的材料形成的材料依次层叠，所以第一薄膜被布置在第一层和最上层中并且彼此相邻以相互作用 等离子体激元 以及围绕芯部设置的包层，其由比形成第一薄膜的材料低的导电性材料形成，并且比形成第二薄膜的材料具有更高的折射率。 在光波导器件中具有高电导率的至少两层的金属薄膜可以产生组合的表面等离子体激元模式，并且在薄金属薄膜的长度方向上传播产生的表面等离子体激元模式。 因此，传播信号比由单个薄膜支持的表面等离子体模式传播损耗更小。