公开(公告)号：US06388850B1

公开(公告)日：2002-05-14

申请号：US09376066

申请日：1999-08-17

申请人： Ming-Dou Ker ,  Chen-Chia Wang ,  Hun-Hsien Chang

发明人： Ming-Dou Ker ,  Chen-Chia Wang ,  Hun-Hsien Chang

IPC分类号： H02H900

CPC分类号： H01L27/0251 ,  H02H9/046

摘要： An apparatus of preventing integrated circuits from interfering by electrostatic-discharge (ESD), applied in an internal circuit and an input pad, both coupled with a first power line and a second power line, comprises a voltage clamp circuit and a voltage bias circuit. The voltage clamp circuit, with a transistor, connects to the second power line for clamping potential level through the voltage clamp circuit. The voltage bias circuit, with at least one diode coupled in series, connects to the voltage clamp circuit and the first power line for biasing the voltage clamp circuit to the second power line.

摘要翻译： 防止集成电路与施加在内部电路中的静电放电（ESD）干扰的装置和与第一电力线和第二电力线耦合的输入焊盘的装置包括电压钳位电路和电压偏置电路。 具有晶体管的电压钳位电路连接到第二电源线，用于通过电压钳位电路钳位电位电平。 具有串联耦合的至少一个二极管的电压偏置电路连接到电压钳位电路和用于将电压钳位电路偏压到第二电力线的第一电力线。

公开(公告)号：US20050287784A1

公开(公告)日：2005-12-29

申请号：US10878708

申请日：2004-06-28

申请人： Harry Chuang ,  Chen-Chia Wang

发明人： Harry Chuang ,  Chen-Chia Wang

IPC分类号： H01L21/44 ,  H01L21/768 ,  H01L23/528

CPC分类号： H01L23/528 ,  H01L21/76838 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed herein are a junction where electrical interconnects on a semiconductor substrate intersect and a method of manufacturing a junction where electrical interconnects on a semiconductor substrate intersect is disclosed. In one embodiment, the junction includes a portion of at least one current providing electrical interconnect having a length parallel to a longitudinal axis thereof and configured to provide a flow of electrical current. In addition, the junction includes a portion of at least one current receiving electrical interconnect having a length parallel to a longitudinal axis thereof and configured to intersect with the at least one current providing interconnect at the junction in order to receive the flow of electrical current from the at least one current providing interconnect. Also, in such an embodiment, the junction includes at least one current directing feature positioned between the current providing and current receiving interconnects, and oriented substantially non-perpendicular to the longitudinal axis of the at least one current providing interconnect.

摘要翻译： 这里公开了半导体基板上的电互连相交的结以及半导体基板上的电互连相交的结的制造方法。 在一个实施例中，接合部包括至少一个电流的一部分，其提供具有平行于其纵向轴线的长度的电互连，并且被配置为提供电流。 另外，接头包括具有平行于其纵向轴线的长度的至少一个电流接收电互连的一部分，并且被配置为在接合处与至少一个电流提供互连相交，以便接收来自 所述至少一个电流提供互连。 而且，在这种实施例中，接合部包括位于电流提供和电流接收互连之间的至少一个电流引导特征，并且基本上不垂直于至少一个电流提供互连的纵轴取向。

公开(公告)号：US07199035B2

公开(公告)日：2007-04-03

申请号：US10878708

申请日：2004-06-28

申请人： Harry Chuang ,  Chen-Chia Wang

发明人： Harry Chuang ,  Chen-Chia Wang

IPC分类号： H01L21/44 ,  H01L21/4763 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/528 ,  H01L21/76838 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed herein are a junction where electrical interconnects on a semiconductor substrate intersect and a method of manufacturing a junction where electrical interconnects on a semiconductor substrate intersect is disclosed. In one embodiment, the junction includes a portion of at least one current providing electrical interconnect having a length parallel to a longitudinal axis thereof and configured to provide a flow of electrical current. In addition, the junction includes a portion of at least one current receiving electrical interconnect having a length parallel to a longitudinal axis thereof and configured to intersect with the at least one current providing interconnect at the junction in order to receive the flow of electrical current from the at least one current providing interconnect. Also, in such an embodiment, the junction includes at least one current directing feature positioned between the current providing and current receiving interconnects, and oriented substantially non-perpendicular to the longitudinal axis of the at least one current providing interconnect.

摘要翻译： 这里公开了半导体基板上的电互连相交的结以及半导体基板上的电互连相交的结的制造方法。 在一个实施例中，接合部包括至少一个电流的一部分，其提供具有平行于其纵向轴线的长度的电互连，并且被配置为提供电流。 另外，接头包括具有平行于其纵向轴线的长度的至少一个电流接收电互连的一部分，并且被配置为在接合处与至少一个电流提供互连相交，以便接收来自 所述至少一个电流提供互连。 而且，在这种实施例中，接合部包括位于电流提供和电流接收互连之间的至少一个电流引导特征，并且基本上不垂直于至少一个电流提供互连的纵轴取向。

公开(公告)号：US06600564B1

公开(公告)日：2003-07-29

申请号：US09577308

申请日：2000-05-23

申请人： Chen-Chia Wang ,  Sudhir Trivedi ,  Jacob B. Khurgin

发明人： Chen-Chia Wang ,  Sudhir Trivedi ,  Jacob B. Khurgin

IPC分类号： G01B902

CPC分类号： G01S7/483 ,  G01B9/02003 ,  G01B9/02004 ,  G01S7/4917 ,  G01S17/08 ,  G01S17/102 ,  G01S17/325

摘要： This invention is a device and method for the measurement of optical path length. A frequency chirped electromagnetic wave source, such as a laser beam, is split into two branches. A reference branch is projected directly onto a photosensor, while a probe branch is launched towards a target whose distance relative to the reference path is to be determined. A reflected wave from the target is collected and mixed with the reference onto a photosensor. Due to the unequal path lengths traveled by the reference and the reflected probe laser beams as well as the chirped nature of their frequencies, a certain optical frequency difference exists between the two beams. This frequency difference is linearly proportional to the relative optical path length difference between the two laser beams and the relative optical path length can be readily determined by using a photosensor that generates photocurrents linearly proportional to the relative optical frequency differences between the reference and reflected branches.

摘要翻译： 本发明是用于测量光路长度的装置和方法。 频率啁啾的电磁波源如激光束被分成两个分支。 参考分支直接投影到光电传感器上，同时将探针分支发射到目标，其距离将相对于参考路径确定。 收集来自目标物的反射波并将其与参考物混合到光电传感器上。 由于参考和反射的探测激光束行进的不等路径长度以及它们的频率的啁啾特性，两个光束之间存在一定的光学频差。 该频率差与两个激光束之间的相对光程长度差线性成比例，并且可以通过使用产生与参考和反射分支之间的相对光学频率差线性成比例的光电流的光电传感器容易地确定相对光程长度。

公开(公告)号：US08072609B1

公开(公告)日：2011-12-06

申请号：US12345861

申请日：2008-12-30

申请人： Sudhir Trivedi ,  Venkataraman Swaminathan ,  Chen-Chia Wang

发明人： Sudhir Trivedi ,  Venkataraman Swaminathan ,  Chen-Chia Wang

IPC分类号： G01B9/02

CPC分类号： G01H9/00 ,  G01D5/266

摘要： An enhanced sensitivity laser vibrometer with increased output signal strength and more sensitive surface vibration detection, is provided by using a reflective mirror assembly to repeatedly bounce the sensing laser beam against the acoustic pressure-sensing diaphragm to magnify the acoustic incident pressure wave being detected. The enhancement in signal strength, in terms of power spectral density, is a function of the number of bounces squared and the detection of surface vibrations with a displacement of smaller than 4 picometers is demonstrated experimentally.

摘要翻译： 通过使用反射镜组件来重复地将感测激光束反弹抵抗声压感测膜，以增大被检测到的声学入射压力波，提供具有增加的输出信号强度和更灵敏的表面振动检测的增强灵敏度激光振动计。 在功率谱密度方面，信号强度的增强是反射数平方的函数，并且通过实验证明了具有小于4皮米位移的表面振动的检测。

公开(公告)号：US20050250049A1

公开(公告)日：2005-11-10

申请号：US11032563

申请日：2005-01-10

申请人： Chen-Chia Wang ,  Sudhir Trivedi

发明人： Chen-Chia Wang ,  Sudhir Trivedi

IPC分类号： G03C5/00 ,  G03F7/20

CPC分类号： G03F7/70958 ,  G03F7/70291 ,  G03F7/70391 ,  G03F7/70575

摘要： Device and method for exposing photoresists on semiconductor wafers without using physical masks while improving significantly the time- and cost-efficiencies for the manufacturing of integrated-circuit chips. Two electromagnetic sources of different wavelengths are used as the light sources, with the one having longer wavelength functioning as the control light beam while the one with an appropriately shorter wavelength is used to eventually expose the photoresists on semiconductor wafers. Images of the desired circuit patterns are first imposed onto the longer wavelength control light beam using, for example but not limited to, laser diode arrays, light emitting diode arrays, and devices similar to liquid crystal displays. The image-carrying control light beam interacts inside the bi-wavelength saturable absorber with the short-wavelength exposure light beam which carries initially a uniform intensity profile. The bi-wavelength saturable absorber transfers the images carried by the control light beam to the exposure light beam upon its exit from the bi-wavelength saturable absorber. The exposure light beam can then be used to expose photoresists without using any physical masks. The invention eliminates the prohibitively high front end costs associated with the design and production of large physical masks with fine spatial features sought for by the state-of-the-art integrated-circuit manufacturing processes. The invention, when combined with appropriate light sources, also improves the throughput rates for the fabrication of integrated-circuit chips by orders of magnitude, further enhancing the economic impacts.

摘要翻译： 用于在不使用物理掩模的情况下在半导体晶片上曝光光致抗蚀剂的装置和方法，同时显着地改善用于制造集成电路芯片的时间和成本效率。 使用不同波长的两个电磁源作为光源，其中具有较长波长的电磁源用作控制光束，而具有适当较短波长的光源用于最终暴露半导体晶片上的光致抗蚀剂。 使用例如但不限于激光二极管阵列，发光二极管阵列和类似于液晶显示器的装置，首先将期望的电路图案的图像施加到较长波长控制光束上。 图像载体控制光束与双波长可饱和吸收体内部相互作用，其中短波长曝光光束起始具有均匀的强度分布。 双波长可饱和吸收体在从双波长可饱和吸收体排出时将由控制光束承载的图像传送到曝光光束。 然后曝光光束可用于曝光光致抗蚀剂而不使用任何物理掩模。 本发明消除了与最先进的集成电路制造工艺所寻求的具有精细空间特征的大型物理掩模的设计和生产相关的极高的前端成本。 本发明与合适的光源组合时，也提高了集成电路芯片制造的吞吐量数量级，进一步增强了经济影响。