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公开(公告)号:US20090027320A1
公开(公告)日:2009-01-29
申请号:US12056355
申请日:2008-03-27
申请人: Ming-Sheng LAI , Chih-Wei Wang , Hsueh-Ying Huang , Chen-Kuo Yang
发明人: Ming-Sheng LAI , Chih-Wei Wang , Hsueh-Ying Huang , Chen-Kuo Yang
IPC分类号: G09G3/36
CPC分类号: G09G3/3659 , G09G3/3614 , G09G2300/0443 , G09G2300/0447 , G09G2300/0809 , G09G2300/0876 , G09G2310/0281 , G09G2320/028
摘要: A liquid crystal display and a driving method thereof are provided. The liquid crystal display includes a plurality of pixels, a plurality of scan lines, and a plurality of data lines. Each pixel includes a plurality of sub-pixels. Each sub-pixel is coupled to the data line, and includes a switch, a storage capacitor, and a sub-pixel electrode. The switch is coupled to a scan line to receive a scan signal. The switch is turned on by the scan signal to receive a data signal transmitted from the data line. The storage capacitors of the sub-pixels of each pixel are coupled to the scan lines, or the storage capacitor of one of the sub-pixels of each pixel is coupled to a common electrode and the storage capacitors of the other sub-pixels are coupled to the scan lines. The switch and the storage capacitor of each sub-pixel are coupled to different scan lines. The method includes transmitting the scan signal having a plurality of voltage levels to modulate the voltage levels of one or more sub-pixel electrodes of the sub-pixels of the same pixel, thereby enabling the sub-pixels of the same pixel to have different voltage levels.
摘要翻译: 提供了一种液晶显示器及其驱动方法。 液晶显示器包括多个像素,多条扫描线和多条数据线。 每个像素包括多个子像素。 每个子像素耦合到数据线,并且包括开关,存储电容器和子像素电极。 开关耦合到扫描线以接收扫描信号。 开关由扫描信号接通,以接收从数据线发送的数据信号。 每个像素的子像素的存储电容器耦合到扫描线,或者每个像素的一个子像素的存储电容器耦合到公共电极,并且其他子像素的存储电容器被耦合 到扫描线。 每个子像素的开关和存储电容器耦合到不同的扫描线。 该方法包括发送具有多个电压电平的扫描信号,以调制相同像素的子像素的一个或多个子像素电极的电压电平,从而使相同像素的子像素具有不同的电压 水平。
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公开(公告)号:US20100150302A1
公开(公告)日:2010-06-17
申请号:US12334874
申请日:2008-12-15
申请人: Tsung-Ting TSAI , Ming-Sheng LAI , Min-Feng CHIANG , Po-Yuan LIU
发明人: Tsung-Ting TSAI , Ming-Sheng LAI , Min-Feng CHIANG , Po-Yuan LIU
IPC分类号: G11C19/00
CPC分类号: G11C19/28
摘要: A shift register comprises a plurality of stages, {Sn}, n=1, 2, . . . , N, N being a positive integer. In one embodiment, each stage Sn includes a pull-up circuit having an input for receiving one of a first clock signal, CK1, and a second clock signal, XCK1, an output for responsively outputting an output signal, On, and an input node Qn, a pull-up control circuit electrically coupled to the input node Qn and configured such that when receiving a first input signal, the pull-up control circuit responsively generates a signal that is provided to the input node Qn to turn on the pull-up circuit, a pull-down circuit electrically coupled to the input node Qn and configured to provide a first voltage to one of the input node Qn and the output of the pull-up circuit, and a pull-down control circuit configured to receive one of a third clock signal, CK2, and a fourth clock signal, XCK2, and responsively generate the first voltage to turn on the pull-down circuit of the stage Sn and the pull-down circuit of one of the stage Sn−1 and the stage Sn+1.
摘要翻译: 移位寄存器包括多个级,{Sn},n = 1,2。 。 。 ,N,N为正整数。 在一个实施例中,每级Sn包括一个上拉电路,该上拉电路具有用于接收第一时钟信号CK1和第二时钟信号XCK1中的一个的输入端,用于响应地输出输出信号的输出端和输入节点 Qn是电耦合到输入节点Qn并被配置为使得当接收到第一输入信号时,上拉控制电路响应地产生提供给输入节点Qn的信号,以接通上拉电路, 电耦合到输入节点Qn并被配置为向输入节点Qn和上拉电路的输出之一提供第一电压的下拉电路,以及被配置为接收一个电压的下拉控制电路 第三时钟信号CK2和第四时钟信号XCK2,并且响应地产生第一电压以接通级Sn的下拉电路和级Sn-1之一的下拉电路和 阶段Sn + 1。
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