APPARATUS, SYSTEM, AND METHOD FOR DYNAMIC PHASE EQUALIZATION IN A COMMUNICATION CHANNEL
    3.
    发明申请
    APPARATUS, SYSTEM, AND METHOD FOR DYNAMIC PHASE EQUALIZATION IN A COMMUNICATION CHANNEL 有权
    用于通信信道中动态相位均衡的装置,系统和方法

    公开(公告)号:US20080112503A1

    公开(公告)日:2008-05-15

    申请号:US11560257

    申请日:2006-11-15

    IPC分类号: H04L25/03

    CPC分类号: H04L25/0264 H04L25/0286

    摘要: An apparatus, system, and method are disclosed for dynamic phase equalization in a communication channel. A transmitter history module stores a plurality of bits from a data stream that is transmitted through the communication channel. A transmitter detection module detects a pre-transition bit of a first value that is preceded in the data stream by at least one bit of the first value and followed by a transition bit with a second value. A driver module transmits the data stream by driving the communication channel. A transition module pre-drives the communication channel to the second voltage of the transition bit during a bit time interval of the pre-transition bit.

    摘要翻译: 公开了用于通信信道中的动态相位均衡的装置,系统和方法。 发射机历史模块从通过通信信道发送的数据流存储多个比特。 发射机检测模块检测在数据流中前面的第一值的前转换比特的第一值的至少一个比特,然后跟随具有第二值的转换比特。 驾驶员模块通过驱动通信信道来发送数据流。 转换模块在预转换位的位时间间隔期间将通信通道预驱动到转换位的第二电压。

    Apparatus, system, and method for dynamic phase equalization in a communication channel
    6.
    发明授权
    Apparatus, system, and method for dynamic phase equalization in a communication channel 有权
    通信信道中动态相位均衡的装置,系统和方法

    公开(公告)号:US07813447B2

    公开(公告)日:2010-10-12

    申请号:US11560257

    申请日:2006-11-15

    IPC分类号: H04L25/03

    CPC分类号: H04L25/0264 H04L25/0286

    摘要: An apparatus, system, and method are disclosed for dynamic phase equalization in a communication channel. A transmitter history module stores a plurality of bits from a data stream that is transmitted through the communication channel. A transmitter detection module detects a pre-transition bit of a first value that is preceded in the data stream by at least one bit of the first value and followed by a transition bit with a second value. A driver module transmits the data stream by driving the communication channel. A transition module pre-drives the communication channel to the second voltage of the transition bit during a bit time interval of the pre-transition bit.

    摘要翻译: 公开了用于通信信道中的动态相位均衡的装置,系统和方法。 发射机历史模块从通过通信信道发送的数据流存储多个比特。 发射机检测模块检测在数据流中前面的第一值的前转换比特的第一值的至少一个比特,然后跟随具有第二值的转换比特。 驾驶员模块通过驱动通信信道来发送数据流。 转换模块在预转换位的位时间间隔期间将通信通道预驱动到转换位的第二电压。

    DESIGN STRUCTURE FOR A COMPUTER MEMORY SYSTEM WITH A SHARED MEMORY MODULE JUNCTION CONNECTOR
    10.
    发明申请
    DESIGN STRUCTURE FOR A COMPUTER MEMORY SYSTEM WITH A SHARED MEMORY MODULE JUNCTION CONNECTOR 审中-公开
    具有共享存储器模块连接器的计算机存储器系统的设计结构

    公开(公告)号:US20090007048A1

    公开(公告)日:2009-01-01

    申请号:US12203335

    申请日:2008-09-03

    IPC分类号: G06F17/50

    CPC分类号: H01R25/006

    摘要: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a memory module system and DIMM connector is provided. A DIMM connector includes a plurality of DIMM sockets for receiving a corresponding plurality of DIMMs in a radially oriented, angularly spaced orientation. The DIMM sockets are connected in parallel at a memory module junction so that socket terminals of each DIMM socket are joined to the same relative terminal of all the other DIMM sockets along electronic pathways of substantially equal length. A memory controller selectively communicates with the DIMMs via the DIMM junction. By virtue of the improved topology, impedance within the DIMM connector may be better matched to minimize reflections and improve signal quality.

    摘要翻译: 提供了体现在用于设计,制造和/或测试存储器模块系统和DIMM连接器的机器可读存储介质中的设计结构。 DIMM连接器包括多个DIMM插座,用于以径向定向的,有角度间隔的方向接收相应的多个DIMM。 DIMM插槽在存储器模块连接处并联连接,使得每个DIMM插座的插座端子沿着基本相等长度的电子路径连接到所有其他DIMM插槽的相同相对端子。 存储器控制器经由DIMM连接器选择性地与DIMM通信。 凭借改进的拓扑结构,可以更好地匹配DIMM连接器内的阻抗以最小化反射并提高信号质量。