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公开(公告)号：US07672411B2
公开(公告)日：2010-03-02
申请号：US10291984
申请日：2002-11-12
CPC分类号： H04B1/16 , H03D1/04 , H03D1/06 , H03D1/2245 , H03D3/007
摘要： A radio receiver comprising: an antenna for receiving a radio frequency signal amplitude modulated with an audio frequency signal; a digitizer for periodically sampling the radio frequency signal and generating a digital reception signal representative of the amplitude of the radio frequency signal; and a demodulator for demodulating the digital reception signal to generate a representation of the audio frequency signal.
摘要翻译： 一种无线电接收机，包括：用于接收用音频信号幅度调制的射频信号的天线; 数字转换器，用于周期性地对射频信号进行采样并产生表示射频信号振幅的数字接收信号; 以及用于解调数字接收信号以产生音频信号的表示的解调器。
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公开(公告)号：USRE45443E1
公开(公告)日：2015-03-31
申请号：US13410091
申请日：2012-03-01
CPC分类号： H04B1/16 , H03D1/04 , H03D1/06 , H03D1/2245 , H03D3/007
摘要： A radio receiver comprising: an antenna for receiving a radio frequency signal amplitude modulated with an audio frequency signal; a digitizer for periodically sampling the radio frequency signal and generating a digital reception signal representative of the amplitude of the radio frequency signal; and a demodulator for demodulating the digital reception signal to generate a representation of the audio frequency signal.
摘要翻译： 一种无线电接收机，包括：用于接收用音频信号幅度调制的射频信号的天线; 数字转换器，用于周期性地对射频信号进行采样并产生表示射频信号振幅的数字接收信号; 以及用于解调数字接收信号以产生音频信号的表示的解调器。
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公开(公告)号：US07567192B2
公开(公告)日：2009-07-28
申请号：US11761746
申请日：2007-06-12
申请人： Morgan James Colmer
发明人： Morgan James Colmer
IPC分类号： H03M3/00
摘要： A sigma-delta modulator for forming a digital output signal representative of the magnitude of an analog input signal, the modulator comprising a modulation unit comprising: a summation unit for summing the analog input signal with an adjustment signal to form a summation output signal; an integrator arranged to receive the summation output signal and form an integrator output signal dependent thereon; and a quantizer arranged to receive the integrator output signal and form the digital output signal dependent thereon; the sigma-delta modulator further comprising a feedback loop for generating the adjustment signal and comprising a selection circuit arranged to form the adjustment signal by selecting between one of two boundary values for the adjustment signal, the selection being performed in dependence on the digital output signal.
摘要翻译： 一种用于形成表示模拟输入信号幅度的数字输出信号的Σ-Δ调制器，所述调制器包括：调制单元，包括：求和单元，用于将所述模拟输入信号与调整信号相加以形成求和输出信号; 积分器，被布置成接收所述求和输出信号并形成依赖于其的积分器输出信号; 以及量化器，被布置成接收积分器输出信号并形成依赖于其的数字输出信号; 所述Σ-Δ调制器还包括用于产生所述调整信号的反馈回路，并且包括选择电路，所述选择电路经布置以通过在所述调整信号的两个边界值中的一个之间进行选择来形成所述调整信号，所述选择根据所述数字输出信号 。
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