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公开(公告)号：US11594281B2
公开(公告)日：2023-02-28
申请号：US17154241
申请日：2021-01-21
Applicant: Mosaid Technologies Incorporated
Inventor： Chung-Zen Chen , Yang-Chieh Lin , Chung-Shan Kuo
Abstract: A memory device of the non-volatile type including a memory array having a plurality of memory cells organized as sectors, each sector having a main word line associated with a plurality of local word lines, each local word line coupled to the main word line by a respective local word line driver circuit, each of the local word line driver circuits consisting of a first MOS transistor coupled between the respective main word line and a respective local word line and a second MOS transistor coupled between the respective local word line and a first biasing terminal.
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2.发明申请METHOD FOR ERASING MEMORY CELLS IN A FLASH MEMORY DEVICE USING A POSITIVE WELL BIAS VOLTAGE AND A NEGATIVE WORD LINE VOLTAGE 有权使用正偏置电压和负极线电压在闪存存储器件中擦除存储器单元的方法公开(公告)号：US20130250695A1
公开(公告)日：2013-09-26
申请号：US13895591
申请日：2013-05-16
Applicant: Mosaid Technologies Incorporated
Inventor： Chung-Zen Chen , Yang-Chieh Lin , Chung-Shan Kuo
IPC: G11C16/02
CPC classification number: G11C16/14 , G11C16/02 , G11C16/0408 , G11C16/08 , G11C16/16
Abstract: A memory device of the non-volatile type including a memory array having a plurality of memory cells organized as sectors, each sector having a main word line associated with a plurality of local word lines, each local word line coupled to the main word line by a respective local word line driver circuit, each of the local word line driver circuits consisting of a first MOS transistor coupled between the respective main word line and a respective local word line and a second MOS transistor coupled between the respective local word line and a first biasing terminal.
Abstract translation: 一种非易失性存储器件，包括存储器阵列，该存储器阵列具有被组织为扇区的多个存储器单元，每个扇区具有与多个本地字线相关联的主字线，每个本地字线通过 各自的本地字线驱动电路，每个本地字线驱动电路由耦合在相应主字线和相应本地字线之间的第一MOS晶体管和耦合在相应本地字线和第一 偏置端子
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