公开(公告)号：US10009059B2

公开(公告)日：2018-06-26

申请号：US15198214

申请日：2016-06-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Hayato Nakamura ,  Eigo Tange ,  Tadashi Matsuoka ,  Yasushi Shigeno

IPC: H04B1/44 ,  H04W72/04 ,  H04B1/00 ,  H04W88/02

CPC classification number: H04B1/44 ,  H04B1/006 ,  H04B1/0064 ,  H04B1/0067 ,  H04W72/0453 ,  H04W88/02

Abstract: Provided is a high frequency module capable of reducing the IMD. During the transmission/reception operation based on W-CDMA, control signals VSWCC, VTRXCC are output as Hi signals from a control logic. Consequently, transistor T1 is turned ON, and transistors T2, T3 are respectively turned OFF. When the transistor T1 is turned ON, the voltage output from an operational amplifier is output as the signal VVSW to a control terminal, and the control signal VTRXC is output as a Hi signal. The signal VVSW is of a voltage level that is lower than that of the control signal VTRXC. The control signal VTRXC is a signal for turning ON a transistor circuit Q1, and the signal VVSW is a signal for supplying a DC voltage to the antenna potential. It is thereby possible to reduce the ON resistance of the transistor circuit Q1 and improve the IMD characteristics.

公开(公告)号：US09444512B2

公开(公告)日：2016-09-13

申请号：US14361448

申请日：2012-11-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Eigo Tange ,  Shigeki Koya ,  Yasushi Shigeno ,  Akishige Nakajima

IPC: H04B1/38 ,  H04B1/525 ,  H04B1/00 ,  H04B15/04 ,  H04B1/44

CPC classification number: H04B1/525 ,  H04B1/0064 ,  H04B1/44 ,  H04B15/04

Abstract: Reduction of intermodulation distortion in a high-frequency switch is achieved. A semiconductor device (1) includes an antenna terminal (ANT_LB), plural external terminals (RX_LB, TX_LB, TRX_LB, TERM_LB), plural first high-frequency switches (101 to 104), and plural control terminals. Each first high-frequency switch includes plural first field-effect transistors, plural first resistors (Rg_1 to Rg_6) connected to the gate terminals of the first field-effect transistors, and a second resistor (Rc) disposed between the corresponding control terminal and the first resistors. The second resistor in the first high-frequency switch disposed between the first terminal supplied with an RF transmission signal and an RF reception signal of a frequency division duplex system and the antenna terminal is configured so that linearity of current-voltage characteristics thereof is higher than linearity of current-voltage characteristics of the first resistor.

Abstract translation: 实现了降低高频开关中的互调失真。 半导体器件（1）包括天线端子（ANT_LB），多个外部端子（RX_LB，TX_LB，TRX_LB，TERM_LB），多个第一高频开关（101〜104）和多个控制端子。 每个第一高频开关包括多个第一场效应晶体管，连接到第一场效应晶体管的栅极端的多个第一电阻器（Rg_1至Rg_6）和设置在相应的控制端子与第二场效应晶体管之间的第二电阻器（Rc） 第一个电阻 布置在提供有RF传输信号的第一端子与频分双工系统的RF接收信号之间的第一高频开关中的第二电阻器和天线端子被配置为使得电流 - 电压特性的线性度高于 第一电阻器的电流 - 电压特性的线性度。

公开(公告)号：US09413415B2

公开(公告)日：2016-08-09

申请号：US14366733

申请日：2012-12-14

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Hayato Nakamura ,  Eigo Tange ,  Tadashi Matsuoka ,  Yasushi Shigeno

IPC: H04B1/44 ,  H04W88/02 ,  H04B1/00

CPC classification number: H04B1/44 ,  H04B1/006 ,  H04B1/0064 ,  H04B1/0067 ,  H04W72/0453 ,  H04W88/02

Abstract: Provided is a high frequency module capable of reducing the IMD. During the transmission/reception operation based on W-CDMA, control signals VSWCC, VTRXCC are output as Hi signals from a control logic. Consequently, transistor T1 is turned ON, and transistors T2, T3 are respectively turned OFF. When the transistor T1 is turned ON, the voltage output from an operational amplifier is output as the signal VVSW to a control terminal, and the control signal VTRXC is output as a Hi signal. The signal VVSW is of a voltage level that is lower than that of the control signal VTRXC. The control signal VTRXC is a signal for turning ON a transistor circuit Q1, and the signal VVSW is a signal for supplying a DC voltage to the antenna potential. It is thereby possible to reduce the ON resistance of the transistor circuit Q1 and improve the IMD characteristics.

Abstract translation: 提供了能够减少IMD的高频模块。 在基于W-CDMA的发送/接收操作期间，控制信号VSWCC，VTRXCC作为Hi信号从控制逻辑输出。 因此，晶体管T1导通，晶体管T2，T3分别断开。 当晶体管T1导通时，从运算放大器输出的电压作为信号VVSW输出到控制端，控制信号VTRXC输出为Hi信号。 信号VVSW具有比控制信号VTRXC低的电压电平。 控制信号VTRXC是用于接通晶体管电路Q1的信号，信号VVSW是向天线电位提供直流电压的信号。 从而可以降低晶体管电路Q1的导通电阻并提高IMD特性。

公开(公告)号：US10438731B2

公开(公告)日：2019-10-08

申请号：US16026469

申请日：2018-07-03

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takeyuki Okabe ,  Eigo Tange ,  Takayuki Tsutsui

IPC: H03F3/187 ,  H01F17/00 ,  H03F3/19 ,  H03F3/21 ,  H03F3/60

Abstract: An inductor includes first and second wirings respectively formed in a substantially spiral shape on first and second surfaces of a multilayer substrate. The multilayer substrate includes plural dielectric layers stacked on each other in a predetermined direction. The multilayer substrate includes a first layer having the first surface, which is an end surface in the predetermined direction, and a second layer having the second surface within the multilayer substrate. The width of the second wiring is smaller than that of the first wiring. The first and second wirings are electrically connected in parallel with each other. The inductance of the first wiring and that of the second wiring are substantially equal to each other. When the first and second wirings are projected on the first surface in the predetermined direction, entirety of a projected image of the second wiring is contained within that of the first wiring.

公开(公告)号：US20140328223A1

公开(公告)日：2014-11-06

申请号：US14361448

申请日：2012-11-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Eigo Tange ,  Shigeki Koya ,  Yasushi Shigeno ,  Akishige Nakajima

IPC: H04B1/52 ,  H04B1/44

CPC classification number: H04B1/525 ,  H04B1/0064 ,  H04B1/44 ,  H04B15/04

Abstract: Reduction of intermodulation distortion in a high-frequency switch is achieved. A semiconductor device (1) includes an antenna terminal (ANT_LB), plural external terminals (RX_LB, TX_LB, TRX_LB, TERM_LB), plural first high-frequency switches (101 to 104), and plural control terminals. Each first high-frequency switch includes plural first field-effect transistors, plural first resistors (Rg—1 to Rg—6) connected to the gate terminals of the first field-effect transistors, and a second resistor (Rc) disposed between the corresponding control terminal and the first resistors. The second resistor in the first high-frequency switch disposed between the first terminal supplied with an RF transmission signal and an RF reception signal of a frequency division duplex system and the antenna terminal is configured so that linearity of current-voltage characteristics thereof is higher than linearity of current-voltage characteristics of the first resistor.

Abstract translation: 实现了降低高频开关中的互调失真。 半导体装置（1）包括天线端子（ANT_LB），多个外部端子（RX_LB，TX_LB，TRX_LB，TERM_LB），多个第一高频开关（101〜104）和多个控制端子。 每个第一高频开关包括多个第一场效应晶体管，连接到第一场效应晶体管的栅极端的多个第一电阻器（Rg-1至Rg-6）和设置在相应的第一场效应晶体管之间的第二电阻器（Rc） 控制端子和第一个电阻。 布置在提供有RF传输信号的第一端子与频分双工系统的RF接收信号之间的第一高频开关中的第二电阻器和天线端子被配置为使得电流 - 电压特性的线性度高于 第一电阻器的电流 - 电压特性的线性度。