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公开(公告)号:US20240096554A1
公开(公告)日:2024-03-21
申请号:US18527434
申请日:2023-12-04
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Ryota ASO
Abstract: A multilayer ceramic capacitor includes dielectric layers and inner electrode layers that are stacked and each made of a ceramic material. Each of the inner electrode layers includes through holes. Inside the through holes, a portion of the dielectric layers is packed and Si that is derived from the dielectric layers segregates.
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公开(公告)号:US20240096553A1
公开(公告)日:2024-03-21
申请号:US18527439
申请日:2023-12-04
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Ryota ASO , Daisuke HAMADA
CPC classification number: H01G4/012 , H01G4/0085 , H01G4/1227 , H01G4/1245 , H01G4/30
Abstract: A multilayer ceramic capacitor includes dielectric layers and inner electrode layers stacked and each made of a ceramic material. Each of the inner electrode layers includes through holes. An average circularity of the through holes is equal to or greater than to about 0.6.
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公开(公告)号:US20230197340A1
公开(公告)日:2023-06-22
申请号:US18110396
申请日:2023-02-16
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Daiki FUKUNAGA , Hideaki TANAKA , Masahiro WAKASHIMA , Daisuke HAMADA , Hironori TSUTSUMI , Satoshi MAENO , Ryota ASO , Koji MORIYAMA , Akihiro TSURU
CPC classification number: H01G4/1227 , H01G4/012 , H01G4/0085 , H01G4/2325 , H01G4/224 , H01G4/30
Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.
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公开(公告)号:US20200066446A1
公开(公告)日:2020-02-27
申请号:US16547641
申请日:2019-08-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Daiki FUKUNAGA , Hideaki TANAKA , Masahiro WAKASHIMA , Daisuke HAMADA , Hironori TSUTSUMI , Satoshi MAENO , Ryota ASO , Koji MORIYAMA , Akihiro TSURU
Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.
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公开(公告)号:US20240312712A1
公开(公告)日:2024-09-19
申请号:US18675491
申请日:2024-05-28
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Daiki FUKUNAGA , Hideaki TANAKA , Masahiro WAKASHIMA , Daisuke HAMADA , Hironori TSUTSUMI , Satoshi MAENO , Ryota ASO , Koji MORIYAMA , Akihiro TSURU
CPC classification number: H01G4/1227 , H01G4/0085 , H01G4/012 , H01G4/224 , H01G4/2325 , H01G4/30
Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.
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公开(公告)号:US20210350983A1
公开(公告)日:2021-11-11
申请号:US17368909
申请日:2021-07-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Daiki FUKUNAGA , Hideaki TANAKA , Masahiro WAKASHIMA , Daisuke HAMADA , Hironori TSUTSUMI , Satoshi MAENO , Ryota ASO , Koji MORIYAMA , Akihiro TSURU
Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.
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