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公开(公告)号：US20240312722A1
公开(公告)日：2024-09-19
申请号：US18672063
申请日：2024-05-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yukihiro FUJITA , Ryutaro YAMATO
CPC classification number: H01G4/30 , H01G4/012 , H01G4/232 , H01G4/1227 , H01G4/1236
Abstract: A multilayer ceramic capacitor includes a capacitor body including dielectric layers and first and second inner electrodes that are laminated, a first via conductor inside the capacitor body and electrically connected to the first inner electrodes, and a second via conductor inside the capacitor body and electrically connected to the second inner electrodes. In a lamination direction in which the dielectric layers, the first inner electrodes, and the second inner electrodes are laminated, a dimension of the multilayer ceramic capacitor is the same or substantially the same as the dimension of the capacitor body.
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公开(公告)号：US20240387111A1
公开(公告)日：2024-11-21
申请号：US18788282
申请日：2024-07-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Ryutaro YAMATO , Tadateru YAMADA , Shoichiro SUZUKI
Abstract: A multilayer ceramic capacitor includes a capacitor body including dielectric layers, first and second inner electrodes, first and second principal surfaces, first and second side surfaces, and first and second end surfaces, first and second outer electrodes on at least the first principal surface and respectively electrically coupled to the first and second inner electrodes, and first and second bumps on a surface on a first principal surface side of the capacitor body and including one of Au, Cu, or Al. The outer electrodes are not on the second principal surface of the capacitor body. The first and second outer electrode respectively include first and second metal layers in contact with the first and second bumps and made of the same material. Thicknesses of the first and second bumps in the first direction are equal to or greater than about 4.5 μm.
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公开(公告)号：US20240234389A9
公开(公告)日：2024-07-11
申请号：US18404939
申请日：2024-01-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yukihiro FUJITA , Ryutaro YAMATO , Tatsuya FUNAKI , Yoshiaki SATAKE
IPC: H01L25/10 , H01L23/15 , H01L23/528 , H01L23/538 , H01L23/64
CPC classification number: H01L25/105 , H01L23/15 , H01L23/528 , H01L23/5384 , H01L23/642
Abstract: A composite electronic component includes circuit layers, each including an electronic component, that are laminated, first and second circuit layers, a ceramic electronic component between the first and second circuit layers and including via electrodes extending through a body mainly including ceramic and being exposed at a corresponding one of a main surface on one side and a main surface on another side, and a sealing resin covering at least the ceramic electronic component at a location between the first and second circuit layers. At least one electronic component included in each of the first and second circuit layers are electrically connected by the via electrodes.
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公开(公告)号：US20240136342A1
公开(公告)日：2024-04-25
申请号：US18404939
申请日：2024-01-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yukihiro FUJITA , Ryutaro YAMATO , Tatsuya FUNAKI , Yoshiaki SATAKE
IPC: H01L25/10 , H01L23/15 , H01L23/528 , H01L23/538 , H01L23/64
CPC classification number: H01L25/105 , H01L23/15 , H01L23/528 , H01L23/5384 , H01L23/642
Abstract: A composite electronic component includes circuit layers, each including an electronic component, that are laminated, first and second circuit layers, a ceramic electronic component between the first and second circuit layers and including via electrodes extending through a body mainly including ceramic and being exposed at a corresponding one of a main surface on one side and a main surface on another side, and a sealing resin covering at least the ceramic electronic component at a location between the first and second circuit layers. At least one electronic component included in each of the first and second circuit layers are electrically connected by the via electrodes.
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