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公开(公告)号：US20240088850A1
公开(公告)日：2024-03-14
申请号：US18515574
申请日：2023-11-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masatoshi HASE , Tsutomu OONARO , Takashi SOGA
CPC classification number: H03F3/245 , H03F1/0211 , H03F3/195 , H03F2200/451
Abstract: A transmission circuit appropriately controls output power in response to fluctuations in the impedance of a load. A transmission circuit includes: a transistor to which a bias current IB1 is supplied and that amplifies and outputs an input signal RFin; a transistor to which a bias current IB2 is supplied, that has a collector connected to the collector of the transistor, and that amplifies and outputs the input signal; a current generation circuit that generates a current I2 on the basis of a current I1 from the emitter of the transistor; and a bias control circuit that outputs a first bias control signal for controlling the bias current IB1 and a second bias control signal for controlling the bias current IB2 on the basis of the current I2.
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公开(公告)号：US20240333219A1
公开(公告)日：2024-10-03
申请号：US18616643
申请日：2024-03-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takashi SOGA
CPC classification number: H03F1/0216 , H03F1/302 , H03F3/213
Abstract: The power amplification circuit includes a first transistor that includes a base configured to receive a bias current or a bias voltage and that is configured to amplify an input signal and output a current and a second transistor that includes an emitter connected to the base of the first transistor and that is configured to supply the bias current to the base of the first transistor from the emitter. The power amplification circuit includes a comparison-voltage generation circuit configured to generate a comparison voltage based on an emitter current or voltage of the second transistor and a compensation circuit that is connected to the comparison-voltage generation circuit and that is configured to receive the comparison voltage and a reference voltage and generate a current with a decrease in the bias current or the bias voltage based on the comparison voltage and the reference voltage.
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公开(公告)号：US20240030877A1
公开(公告)日：2024-01-25
申请号：US18356565
申请日：2023-07-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takashi SOGA
CPC classification number: H03F3/21 , H03F1/302 , H03F1/0216 , H03F2200/451
Abstract: A power amplifier circuit includes a first transistor having a base supplied with a bias current, configured to amplify an input signal and to output a first current, a second transistor having an emitter connected to the base of the first transistor, configured to supply the bias current from the emitter to the base of the first transistor, a third transistor connected to a base of the second transistor, a comparison voltage generation circuit, configured to generate a comparison voltage based on a second current flowing through the third transistor, and a comparison circuit connected to the base of the second transistor, to which the comparison voltage and a reference voltage are supplied, configured to decrease a third current supplied to the base of the second transistor as the second current increases based on the comparison voltage and the reference voltage.
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Patent Agency Ranking
公开(公告)号：US20210126586A1
公开(公告)日：2021-04-29
申请号：US17141418
申请日：2021-01-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takashi SOGA
Abstract: A bias circuit includes first and second bipolar transistors, first and second field-effect transistors, and a filter circuit. The first field-effect transistor supplies a bias signal to an amplifier. The filter circuit is connected between a collector terminal of the first bipolar transistor and the ground through a base terminal of the first bipolar transistor. The filter circuit has frequency characteristics for attenuating a high frequency component of an RF signal to be input to the amplifier.
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公开(公告)号：US20210013842A1
公开(公告)日：2021-01-14
申请号：US16925533
申请日：2020-07-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takashi SOGA
Abstract: A bias circuit includes first to fourth transistors and a phase compensation circuit. In the first transistor, a reference current or voltage is supplied to a first terminal, and the first terminal and a second terminal are connected. In the second transistor, a first terminal is connected to the first transistor, and a third terminal is grounded. In the third transistor, a power supply voltage is supplied to a first terminal, a second terminal is connected to the first transistor, and a bias current or voltage is supplied from a third terminal to an amplifier transistor. In the fourth transistor, a first terminal is connected to the third transistor, a second terminal is connected to the second transistor, and a third terminal is grounded. The phase compensation circuit is provided in a path extending from the fourth transistor to the third transistor through the second and first transistors.
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公开(公告)号：US20220416728A1
公开(公告)日：2022-12-29
申请号：US17808624
申请日：2022-06-24
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takashi SOGA , Tsutomu OONARO
Abstract: A power amplifier circuit includes: a transistor which is supplied at a base with a bias current, amplifies an input signal, and outputs a current; a transistor which is connected at a base to the base of the transistor and in which a current commensurate with the current is input to a collector; a transistor which outputs a bias control signal which controls supply of the bias current; and a control circuit which is connected to the collector of the transistor and a gate of the transistor and controls a bias control signal on the basis of a reference current based on a reference signal and the current.
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公开(公告)号：US20200266763A1
公开(公告)日：2020-08-20
申请号：US16867091
申请日：2020-05-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takashi SOGA
Abstract: A bias circuit includes first and second bipolar transistors, first and second field-effect transistors, and a filter circuit. The first field-effect transistor supplies a bias signal to an amplifier. The filter circuit is connected between a collector terminal of the first bipolar transistor and the ground through a base terminal of the first bipolar transistor. The filter circuit has frequency characteristics for attenuating a high frequency component of an RF signal to be input to the amplifier.
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公开(公告)号：US20190074796A1
公开(公告)日：2019-03-07
申请号：US16177866
申请日：2018-11-01
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takashi SOGA
CPC classification number: H03F1/0205 , H03F1/02 , H03F1/0261 , H03F1/302 , H03F1/32 , H03F3/19 , H03F3/21 , H03F3/245 , H03F2200/165 , H03F2200/451
Abstract: A bias circuit includes first and second bipolar transistors, first and second field-effect transistors, and a filter circuit. The first field-effect transistor supplies a bias signal to an amplifier. The filter circuit is connected between a collector terminal of the first bipolar transistor and the ground through a base terminal of the first bipolar transistor. The filter circuit has frequency characteristics for attenuating a high frequency component of an RF signal to be input to the amplifier.
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