SWITCH CIRCUIT
    1.
    发明申请
    SWITCH CIRCUIT 审中-公开

    公开(公告)号:US20190356309A1

    公开(公告)日:2019-11-21

    申请号:US16529936

    申请日:2019-08-02

    Inventor: Toshio SUDA

    Abstract: A switch circuit includes FETs including a first FET group including m FETs, a second FET group including n FETs at a position away from the input terminal than the first FET group, and an intermediate FET between the first FET group and the second FET group, and capacitive elements including m capacitive elements, n capacitive elements, and an intermediate capacitive element, the capacitive element (C1i) (i is an integer between 1 and m inclusive) is connected in parallel to i consecutive FETs of the first FET group starting from a top closer to the input terminal, the capacitive element (C2j) (j is an integer between 1 and n inclusive) is connected in parallel to j consecutive FETs of the second FET group starting from a top closer to the input terminal, and the intermediate capacitive element is connected in parallel to the intermediate FET.

    ELECTRONIC COMPONENT
    2.
    发明申请

    公开(公告)号:US20240395688A1

    公开(公告)日:2024-11-28

    申请号:US18661941

    申请日:2024-05-13

    Abstract: In an electronic component, a package includes a resin portion and a plurality of land electrodes. The resin portion has a first main surface and a second main surface facing each other in a predetermined direction and covers an IC chip. The plurality of land electrodes includes one first land electrode and three or more second land electrodes, which are the remaining land electrodes other than the first land electrode. The area of the first land electrode is larger than the area of each of the three or more second land electrodes in plan view from the predetermined direction. The plan-view shape of the first land electrode is different from the plan-view shapes of the three or more second land electrodes in plan view from the predetermined direction.

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