公开(公告)号：US20240347374A1

公开(公告)日：2024-10-17

申请号：US18135339

申请日：2023-04-17

申请人： NANYA TECHNOLOGY CORPORATION

发明人： KUO-CHUNG HSU ,  EN-JUI LI

IPC分类号： H01L21/762 ,  H10B10/00 ,  H10B12/00 ,  H10B20/25

CPC分类号： H01L21/76224 ,  H10B10/18 ,  H10B12/30 ,  H10B20/25

摘要： A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate and a first isolation structure. The substrate has a cell region and a peripheral region. The first isolation structure is disposed in the cell region of the substrate. The first isolation structure includes a first dielectric layer and a second dielectric layer. The second dielectric layer is spaced apart from the substrate by the first dielectric layer. The second dielectric layer is doped with an impurity.

公开(公告)号：US20240347375A1

公开(公告)日：2024-10-17

申请号：US18135350

申请日：2023-04-17

申请人： NANYA TECHNOLOGY CORPORATION

发明人： KUO-CHUNG HSU ,  EN-JUI LI

IPC分类号： H01L21/762

CPC分类号： H01L21/76224 ,  H10B10/00 ,  H10B12/00 ,  H10B20/25

摘要： A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate having an active region and a shallow trench isolation (STI) adjacent to the active region of the substrate. The STI includes a charge trapping layer and a liner disposed between the charge trapping layer and the active region of the substrate, wherein the charge trapping layer is doped with an impurity.