公开(公告)号：US20120051001A1

公开(公告)日：2012-03-01

申请号：US12916615

申请日：2010-10-31

申请人： NING WU ,  HSIN-KUAN WU ,  HOU-YUAN CHOU ,  SHUN-BO BAI ,  YAN-MEI ZHU

发明人： NING WU ,  HSIN-KUAN WU ,  HOU-YUAN CHOU ,  SHUN-BO BAI ,  YAN-MEI ZHU

IPC分类号： H05K1/00

CPC分类号： H05K1/0225 ,  H05K1/0243

摘要： A PCB includes a number of insulation layers, a number of circuit layers, a signal-interfering component, and a signal-sensitive component. The circuit layers and the insulation layers are stacked alternately. The circuit layers include at least two first circuit layers, a second circuit layer, and a ground layer. The ground layer has a first side and a second side facing away the first side. The first circuit layers are positioned near the first side and include an outmost first circuit layer and at least one inner first circuit layer positioned between the outmost first circuit layer and the ground layer. The second circuit layer is positioned near the second side. The signal-interfering component is positioned on the outmost first circuit layer. The signal-sensitive component is positioned on the second circuit layer. Each inner first circuit layer defines a copper-remove area corresponding to an orthogonal projection of the signal-interfering component thereon.

摘要翻译： PCB包括多个绝缘层，多个电路层，信号干扰部件和信号敏感部件。 电路层和绝缘层交替堆叠。 电路层包括至少两个第一电路层，第二电路层和接地层。 接地层具有朝向第一侧的第一侧和第二侧。 第一电路层位于第一侧附近，并且包括位于最外层的第一电路层和接地层之间的最外层的第一电路层和至少一个内部第一电路层。 第二电路层位于第二侧附近。 信号干扰部件位于最外侧的第一电路层。 信号敏感部件位于第二电路层上。 每个内部第一电路层限定对应于其上的信号干扰部件的正交投影的铜去除区域。

公开(公告)号：US20120310609A1

公开(公告)日：2012-12-06

申请号：US13193627

申请日：2011-07-29

申请人： HSIN-KUAN WU ,  HOU-YUAN CHOU

发明人： HSIN-KUAN WU ,  HOU-YUAN CHOU

IPC分类号： G06F17/10

CPC分类号： H05K1/025 ,  H05K3/0005

摘要： A method for controlling impedance of a multi-layer PCB includes establishing a geometric model using simulation software according to a structure of the multi-layer PCB. A first variable (S) and a second variable (W) are respectively defined in the simulation software. The variable S is set equal to a first desired value. An impedance (R) of the transmission line is set equal to a second desired value. The variable W is set to a value according to a relationship between R, S, and W.

摘要翻译： 用于控制多层PCB的阻抗的方法包括根据多层PCB的结构使用仿真软件建立几何模型。 第一变量（S）和第二变量（W）分别在仿真软件中定义。 变量S被设置为等于第一期望值。 传输线的阻抗（R）被设定为等于第二期望值。 变量W根据R，S，W之间的关系设定为值。

公开(公告)号：US20100101850A1

公开(公告)日：2010-04-29

申请号：US12277250

申请日：2008-11-24

申请人： HOU-YUAN CHOU

发明人： HOU-YUAN CHOU

IPC分类号： H05K1/11 ,  H05K3/00

CPC分类号： H05K1/0268 ,  G01R31/2818 ,  H05K1/0237 ,  H05K1/11 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2203/162 ,  Y10T29/49124 ,  Y10T29/49147

摘要： A printed circuit board includes a signal layer, an insulation layer, and a reference layer. A transmission line is located on the signal layer. A probing pad is located on the transmission line. Two aligned slots defined in opposite sides of the reference layer leaving a connecting portion. The slots and the connecting portion are in vertical alignment with the probing pad. The signal layer, the insulation layer, and the reference layer are configured in a cascading order. An arrangement of the signal layer in relation to the reference layer including the slots and the connecting portion reduces a capacitance effect caused by the probing pad.

摘要翻译： 印刷电路板包括信号层，绝缘层和参考层。 传输线位于信号层上。 探测板位于传输线上。 限定在参考层的相对侧中的两个对准的槽留下连接部分。 槽和连接部分与探测板垂直对准。 信号层，绝缘层和参考层以级联顺序配置。 信号层相对于包括狭缝和连接部分的参考层的布置减小了由探测垫引起的电容效应。