Abstract:
A display device includes a timing controller, a transmission line, and a source driver coupled to the timing controller via the transmission line. The source driver monitors a data rate of a pixel packet in an active area of a frame, synchronizes a clock according to the data rate to generate a synchronized clock, and clocks data in the pixel packet using the synchronized clock.
Abstract:
A method of transmitting signals in a display device includes receiving a first data signal at a first data rate in a first time interval, and receiving a second data signal at a second data rate in a second time interval. The second data signal is generated at the second data rate, the second data rate is different from the first data rate, and the second time interval is non-overlapping with the first time interval.
Abstract:
A driving circuit for driving a display panel is provided. The driving circuit includes a source driver. The source driver is configured to be controlled by a timing controller. The source driver is configured to adjust at least one of an operation frequency and a receiving bandwidth of a source driving circuit of the source driver when at least one of the timing controller and the source driver detects that an interference event occurs.
Abstract:
A driving circuit for driving a display panel is provided. The driving circuit includes a source driver. The source driver is configured to be controlled by a timing controller. The source driver is configured to adjust at least one of an operation frequency and a receiving bandwidth of a source driving circuit of the source driver when at least one of the timing controller and the source driver detects that an interference event occurs.
Abstract:
A timing controller and an anti-interference method thereof are provided. The timing controller includes a timing control circuit. The timing control circuit provides an input signal for controlling a source driver. When at least one of the timing control circuit and the source driver detects that an interference event occurs to the input signal, the timing control circuit is configured to adjust a frequency of a data signal or a clock signal from a normal operation frequency to at least one anti-interference frequency. The timing control signal is further configured to provide at least one of the data signal and the clock signal to the source driver.
Abstract:
A liquid crystal display (LCD) monitor including an LCD display panel for displaying a frame, a timing controller for generating a polarity control signal and a latch signal, and a driving circuit including a plurality of source drivers, each of the plurality of source drivers including a comparison unit for comparing a common electrode voltage with a first and a second reference voltages to generate a comparison result, an enabling unit for generating an enabling signal according to the comparison result, a source driving signal and a reset signal, a horizontal dot inversion control unit for generating a horizontal dot inversion control signal according to the enabling signal, and a polarity control unit for generating a polarity inversion control signal and the reset signal according to the enabling signal, the polarity control signal and the latch signal.
Abstract:
A liquid crystal display and a gate driver thereof are disclosed. The gate driver comprises a first output unit, a second output unit, a first counter, a second counter and a multiplex unit. The first counter counts a clock to control the first output unit to output odd gate driving signals according to a first start signal and a polarity signal. The second counter counts the clock to control the second output unit to output even gate driving signals according to a second start signal and the polarity signal. The multiplex unit selectively outputs the polarity signal to the first counter or the second counter.
Abstract:
The invention provides a display panel driving apparatus and a driving method thereof. The display panel driving apparatus includes a source driver circuit and a timing controller circuit. The source driver circuit loads data to data lines of the display panel in load data periods. The timing controller circuit controls the source driver circuit for dynamically configuring a time length of one of the load data periods according to whether charge sharing occurs. When a charge sharing operation is not performed on at least two of the data lines in the load data period, the load data period has a first time length. When the charge sharing operation is performed on at least two of the data lines in the load data period, the load data period has a second time length longer than the first time length.
Abstract:
A driving circuit and an anti-interference method thereof are provided. The driving circuit includes a source driver. The source driver is configured to be controlled by a timing controller. The source driver is configured to adjust at least one of an operation frequency and a receiving bandwidth of a source driving circuit of the source driver when at least one of the timing controller and the source driver detects that an interference event occurs.
Abstract:
A display apparatus, a gate driver and an operation method thereof are provided. The gate driver includes a first input buffer and a gate line driving circuit. An input terminal of the first input buffer is configured to receive a timing control signal from the outside of the gate driver. The gate line driving circuit is coupled to an output terminal of the first input buffer. The gate line driving circuit is configured to scan a plurality of gate lines of the display panel based on the control of the timing control signal. An output impedance of the first input buffer is correspondingly adjusted according to the coupling noise of the gate driver.