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公开(公告)号:US11444615B2
公开(公告)日:2022-09-13
申请号:US17163559
申请日:2021-02-01
Applicant: Novatek Microelectronics Corp.
Inventor: Liang-Ting Kuo , Chih-Yuan Kung , Kuan-Ting Lin , Chu-Wei Hsia
IPC: H03K17/0812 , H04L25/02
Abstract: A termination circuit, including a termination resistor, a first switch circuit, a second switch circuit, and a control circuit, is provided. A first end of the termination resistor is coupled to a signal pad. A first end of the first switch circuit is coupled to a second end of the termination resistor. A first end of the second switch circuit is coupled to a second end of the first switch circuit. A second end of the second switch circuit is coupled to a reference voltage line. During a period when the second switch circuit is turned on, the control circuit turns on the first switch circuit with a bias voltage. During a period when the second switch circuit is turned off, the control circuit turns off the first switch circuit with a voltage of the first end of the first switch circuit.
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公开(公告)号:US20220247402A1
公开(公告)日:2022-08-04
申请号:US17163559
申请日:2021-02-01
Applicant: Novatek Microelectronics Corp.
Inventor: Liang-Ting Kuo , Chih-Yuan Kung , Kuan-Ting Lin , Chu-Wei Hsia
IPC: H03K17/0812 , H04L25/02
Abstract: A termination circuit, including a termination resistor, a first switch circuit, a second switch circuit, and a control circuit, is provided. A first end of the termination resistor is coupled to a signal pad. A first end of the first switch circuit is coupled to a second end of the termination resistor. A first end of the second switch circuit is coupled to a second end of the first switch circuit. A second end of the second switch circuit is coupled to a reference voltage line. During a period when the second switch circuit is turned on, the control circuit turns on the first switch circuit with a bias voltage. During a period when the second switch circuit is turned off, the control circuit turns off the first switch circuit with a voltage of the first end of the first switch circuit.
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3.
公开(公告)号:US10826521B1
公开(公告)日:2020-11-03
申请号:US16547547
申请日:2019-08-21
Applicant: Novatek Microelectronics Corp.
Inventor: Chun-Po Huang , Liang-Ting Kuo , Yi-Shen Cheng , Chia-Chuan Lee , Soon-Jyh Chang
Abstract: A successive approximation register (SAR) analog to digital converter (ADC) and a method of detecting an offset of a comparator are introduced. The SAR ADC includes a switch circuit, a comparator and a calibration circuit. The switch circuit is configured to perform a swapping operation on a first intermediate analog signal and a second intermediate analog signal to generate a first swapped analog signal and a second swapped analog signal. The comparator is coupled to the switching circuit and is configured to compare the first intermediate analog signal and the second intermediate analog signal before the swapping operation to generate a least-significant-bit value. The comparator is further configured to compare the first swapped analog signal and the second swapped analog signal after the swapping operation to generate a calibration bit value. The calibration circuit is configured to determine whether the comparator has an offset according to the least-significant-bit value and the calibration bit value.
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4.
公开(公告)号:US20200328753A1
公开(公告)日:2020-10-15
申请号:US16547547
申请日:2019-08-21
Applicant: Novatek Microelectronics Corp.
Inventor: Chun-Po Huang , Liang-Ting Kuo , Yi-Shen Cheng , Chia-Chuan Lee , Soon-Jyh Chang
Abstract: A successive approximation register (SAR) analog to digital converter (ADC) and a method of detecting an offset of a comparator are introduced. The SAR ADC includes a switch circuit, a comparator and a calibration circuit. The switch circuit is configured to perform a swapping operation on a first intermediate analog signal and a second intermediate analog signal to generate a first swapped analog signal and a second swapped analog signal. The comparator is coupled to the switching circuit and is configured to compare the first intermediate analog signal and the second intermediate analog signal before the swapping operation to generate a least-significant-bit value. The comparator is further configured to compare the first swapped analog signal and the second swapped analog signal after the swapping operation to generate a calibration bit value. The calibration circuit is configured to determine whether the comparator has an offset according to the least-significant-bit value and the calibration bit value.
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公开(公告)号:US10606294B1
公开(公告)日:2020-03-31
申请号:US16240778
申请日:2019-01-06
Applicant: NOVATEK Microelectronics Corp.
Inventor: Liang-Ting Kuo , Mu-Jung Chen , Chi-Chun Liao
Abstract: A low dropout voltage regulator, coupled to a load circuit receiving a clock signal, includes an amplifier; a power transistor comprising a control terminal, coupled to an output terminal of the amplifier; and a first terminal, coupled to a positive input terminal of the amplifier and the load circuit; and a control circuit, configured to control a current flowing through the power transistor in response to the clock signal.
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