Termination circuit
    1.
    发明授权

    公开(公告)号:US11444615B2

    公开(公告)日:2022-09-13

    申请号:US17163559

    申请日:2021-02-01

    Abstract: A termination circuit, including a termination resistor, a first switch circuit, a second switch circuit, and a control circuit, is provided. A first end of the termination resistor is coupled to a signal pad. A first end of the first switch circuit is coupled to a second end of the termination resistor. A first end of the second switch circuit is coupled to a second end of the first switch circuit. A second end of the second switch circuit is coupled to a reference voltage line. During a period when the second switch circuit is turned on, the control circuit turns on the first switch circuit with a bias voltage. During a period when the second switch circuit is turned off, the control circuit turns off the first switch circuit with a voltage of the first end of the first switch circuit.

    TERMINATION CIRCUIT
    2.
    发明申请

    公开(公告)号:US20220247402A1

    公开(公告)日:2022-08-04

    申请号:US17163559

    申请日:2021-02-01

    Abstract: A termination circuit, including a termination resistor, a first switch circuit, a second switch circuit, and a control circuit, is provided. A first end of the termination resistor is coupled to a signal pad. A first end of the first switch circuit is coupled to a second end of the termination resistor. A first end of the second switch circuit is coupled to a second end of the first switch circuit. A second end of the second switch circuit is coupled to a reference voltage line. During a period when the second switch circuit is turned on, the control circuit turns on the first switch circuit with a bias voltage. During a period when the second switch circuit is turned off, the control circuit turns off the first switch circuit with a voltage of the first end of the first switch circuit.

    Successive approximation register analog to digital converter and offset detection method thereof

    公开(公告)号:US10826521B1

    公开(公告)日:2020-11-03

    申请号:US16547547

    申请日:2019-08-21

    Abstract: A successive approximation register (SAR) analog to digital converter (ADC) and a method of detecting an offset of a comparator are introduced. The SAR ADC includes a switch circuit, a comparator and a calibration circuit. The switch circuit is configured to perform a swapping operation on a first intermediate analog signal and a second intermediate analog signal to generate a first swapped analog signal and a second swapped analog signal. The comparator is coupled to the switching circuit and is configured to compare the first intermediate analog signal and the second intermediate analog signal before the swapping operation to generate a least-significant-bit value. The comparator is further configured to compare the first swapped analog signal and the second swapped analog signal after the swapping operation to generate a calibration bit value. The calibration circuit is configured to determine whether the comparator has an offset according to the least-significant-bit value and the calibration bit value.

    SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGITAL CONVERTER AND OFFSET DETECTION METHOD THEREOF

    公开(公告)号:US20200328753A1

    公开(公告)日:2020-10-15

    申请号:US16547547

    申请日:2019-08-21

    Abstract: A successive approximation register (SAR) analog to digital converter (ADC) and a method of detecting an offset of a comparator are introduced. The SAR ADC includes a switch circuit, a comparator and a calibration circuit. The switch circuit is configured to perform a swapping operation on a first intermediate analog signal and a second intermediate analog signal to generate a first swapped analog signal and a second swapped analog signal. The comparator is coupled to the switching circuit and is configured to compare the first intermediate analog signal and the second intermediate analog signal before the swapping operation to generate a least-significant-bit value. The comparator is further configured to compare the first swapped analog signal and the second swapped analog signal after the swapping operation to generate a calibration bit value. The calibration circuit is configured to determine whether the comparator has an offset according to the least-significant-bit value and the calibration bit value.

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