SRAM core cell design with write assist
    1.
    发明授权
    SRAM core cell design with write assist 有权
    SRAM核心单元设计具有写入辅助功能

    公开(公告)号:US09542992B2

    公开(公告)日:2017-01-10

    申请号:US13865281

    申请日:2013-04-18

    CPC classification number: G11C11/412

    Abstract: A static random access memory (SRAM) cell includes a storage unit configured to store a data bit in a storage node. The SRAM cell further includes an access unit coupled to the storage unit. The access unit is configured to transfer current to the storage node when a word line is asserted. The SRAM cell further includes a row header configured to provide current from a power supply when the word line is not asserted, and to not provide current from the power supply when the word line is asserted. The SRAM cell further includes a column header configured to provide current from a power supply when a write column line is not asserted, and to not provide current from the power supply when the write column line is asserted.

    Abstract translation: 静态随机存取存储器(SRAM)单元包括被配置为在存储节点中存储数据位的存储单元。 SRAM单元还包括耦合到存储单元的存取单元。 访问单元被配置为当字线被断言时将电流传送到存储节点。 SRAM单元进一步包括行标头,其被配置为当字线未被断言时提供来自电源的电流,并且当字线被断言时不提供来自电源的电流。 SRAM单元进一步包括列头,其配置成当写入列线未被置位时提供来自电源的电流,并且当写入列线被断言时不提供来自电源的电流。

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