公开(公告)号：US20230083345A1

公开(公告)日：2023-03-16

申请号：US17468128

申请日：2021-09-07

Applicant: NVIDIA Corporation

Inventor： Ashok Kelur ,  Rahul Suresh ,  Yogesh Kini ,  Karthik Raghavan Ravi ,  Neeraja Gubba ,  Priyal Rathi

IPC: G06N5/04 ,  G06N3/08 ,  G06N3/04 ,  G06F9/54

Abstract: Apparatuses, systems, and techniques to perform multi-architecture execution graphs. In at least one embodiment, a parallel processing platform, such as compute uniform device architecture (CUDA) generates multi-architecture execution graphs comprising a plurality of software kernels to be performed by one or more processor cores having one or more processor architectures.