公开(公告)号：US12265463B2

公开(公告)日：2025-04-01

申请号：US18152666

申请日：2023-01-10

Applicant: NVIDIA Corporation

Inventor： Saumya Nair ,  Yogesh Kini ,  Ashutosh Jain ,  Neeraja Gubba

IPC: G06F11/32 ,  G06F9/54 ,  G06F11/36 ,  G06F11/362 ,  G06F11/3668 ,  G06F11/07 ,  G06F11/22 ,  G06F11/263 ,  G06F11/34

Abstract: One or more embodiments relate to executing a software testing tool to identify function calls—internal and/or external—of software code and their corresponding errors. Once identified-such as during an information gathering operation-the error codes may be returned in place of actual outputs of the function during testing, and the downstream processing of the software as a result of the errors may be evaluated. As such, an automatic software testing tool may be implemented that not only identifies functions calls and corresponding errors, but also evaluates performance of the software in view of the various different error types associated with the function calls.

公开(公告)号：US20240232050A1

公开(公告)日：2024-07-11

申请号：US18152666

申请日：2023-01-10

Applicant: NVIDIA Corporation

Inventor： Saumya Nair ,  Yogesh Kini ,  Ashutosh Jain ,  Neeraja Gubba

IPC: G06F11/36

CPC classification number: G06F11/3644 ,  G06F11/3664 ,  G06F11/3688

Abstract: One or more embodiments of the present disclosure relate to executing a software testing tool to identify function calls—internal and/or external—of software code and their corresponding errors. Once identified—such as during an information gathering operation—the error codes may be returned in place of actual outputs of the function during testing, and the downstream processing of the software as a result of the errors may be evaluated. As such, an automatic software testing tool may be implemented that not only identifies functions calls and corresponding errors, but also evaluates performance of the software in view of the various different error types associated with the function calls.

公开(公告)号：US20230083345A1

公开(公告)日：2023-03-16

申请号：US17468128

申请日：2021-09-07

Applicant: NVIDIA Corporation

Inventor： Ashok Kelur ,  Rahul Suresh ,  Yogesh Kini ,  Karthik Raghavan Ravi ,  Neeraja Gubba ,  Priyal Rathi

IPC: G06N5/04 ,  G06N3/08 ,  G06N3/04 ,  G06F9/54

Abstract: Apparatuses, systems, and techniques to perform multi-architecture execution graphs. In at least one embodiment, a parallel processing platform, such as compute uniform device architecture (CUDA) generates multi-architecture execution graphs comprising a plurality of software kernels to be performed by one or more processor cores having one or more processor architectures.