公开(公告)号：US20220199617A1

公开(公告)日：2022-06-23

申请号：US17644138

申请日：2021-12-14

Applicant: NXP B.V.

Inventor： Jozef Reinerus Maria Bergervoet ,  Xin Yang ,  Mark Pieter van der Heijden ,  Lukas Frederik Tiemeijer ,  Alessandro Baiano

IPC: H01L27/088 ,  H01L23/528 ,  H01L21/8234

Abstract: A metal oxide semiconductor, MOS, device (405) is described that includes a gate terminal, at least one source terminal and at least one drain terminal, wherein at least one source terminal and at least one drain terminal are formed of metal and are connected to a number of respective contact vias. A plurality of local interconnect layers, LIL, (470) are connected respectively to the least one source terminal and at least one drain terminal through the number of respective contact vias, wherein the at least one source terminal and the at least one drain terminal respectively connected to the plurality of LIL (470) are configured such that: the at least one source terminal and the at least one drain terminal do not overlap in a first direction (602) and a second direction (604) that is orthogonal to the first direction (602); and the at least one source terminal and the at least one drain terminal do not overlap or only a proportion of the at least one source terminal and the at least one drain terminal overlap in a third direction (606), where the third direction (606) is orthogonal to both the first direction (602) and the second direction (604).

公开(公告)号：US12211840B2

公开(公告)日：2025-01-28

申请号：US17644138

申请日：2021-12-14

Applicant: NXP B.V.

Inventor： Jozef Reinerus Maria Bergervoet ,  Xin Yang ,  Mark Pieter van der Heijden ,  Lukas Frederik Tiemeijer ,  Alessandro Baiano

IPC: H01L27/08 ,  H01L21/8234 ,  H01L23/528 ,  H01L27/088 ,  H01L23/532

Abstract: A metal oxide semiconductor, MOS, device (405) is described that includes a gate terminal, at least one source terminal and at least one drain terminal, wherein at least one source terminal and at least one drain terminal are formed of metal and are connected to a number of respective contact vias. A plurality of local interconnect layers, LIL, (470) are connected respectively to the least one source terminal and at least one drain terminal through the number of respective contact vias, wherein the at least one source terminal and the at least one drain terminal respectively connected to the plurality of LIL (470) are configured such that: the at least one source terminal and the at least one drain terminal do not overlap in a first direction (602) and a second direction (604) that is orthogonal to the first direction (602); and the at least one source terminal and the at least one drain terminal do not overlap or only a proportion of the at least one source terminal and the at least one drain terminal overlap in a third direction (606), where the third direction (606) is orthogonal to both the first direction (602) and the second direction (604).