公开(公告)号：US20240077578A1

公开(公告)日：2024-03-07

申请号：US18461673

申请日：2023-09-06

Applicant: NXP B.V.

Inventor： Cristian Pavao Moreira ,  Thierry Mesnard ,  Andres Barrilado Gonzalez ,  Mohamed Boulkheir ,  Didier Salle

IPC: G01S7/03 ,  G01S7/282 ,  G01S13/02 ,  G01S13/536

CPC classification number: G01S7/032 ,  G01S7/282 ,  G01S13/0209 ,  G01S13/536

Abstract: A system and method for a radar system are provided. The radar system includes a leader radar device that includes a first clock generation circuit configured to generate a first clock signal, and a first transmitter and receiver configured to transmit and receive radar signals using a first local oscillator signal. The system includes a follower radar device. The follower radar device is configured to receive the first clock signal and the first local oscillator signal from the leader radar device. The follower radar device includes a second clock generation circuit configured to generate a second clock signal, wherein, in a default operational mode of the radar system at least a portion of the second clock generation circuit is disabled, and a second transmitter and receiver configured to transmit and receive first radar signals.

公开(公告)号：US20230023302A1

公开(公告)日：2023-01-26

申请号：US17749201

申请日：2022-05-20

Applicant: NXP B.V.

Inventor： Sylvain Roudiere ,  Vincent Pierre Martinez ,  Didier Salle

IPC: G01S7/02 ,  G01S13/931

Abstract: A mechanism is provided to reduce interference between vehicular radar systems through communicating radar parameters and physical orientation between vehicles and then using directional information to form clusters of radars, which will have consistent modulation parameters. Radar modulation parameters, such as starting frequency, center frequency, bandwidth, slope, ramp direction, timing, and the like for frequency-modulated continuous-wave (FMCW) radars, are adjusted to reduce or eliminate inter-cluster direct interference between clusters oriented in different directions. For other types of radars, in some embodiments, other operational parameters can be adjusted. In some embodiments, some modulation parameters also can be adjusted to reduce or eliminate intra-cluster indirect interference.

公开(公告)号：US20250167738A1

公开(公告)日：2025-05-22

申请号：US18590512

申请日：2024-02-28

Applicant: NXP B.V.

Inventor： Erwin Janssen ,  Mohamad El Ozeir ,  Didier Salle

IPC: H03F1/56 ,  G01R31/28 ,  H03F3/24 ,  H03H7/38

Abstract: A power amplifier integrated circuit with a tunable impedance matching network and associated methods of testing and operation are provided. The power amplifier integrated circuit includes a power amplifier having an output, an output node coupled to the output of the power amplifier, and a tunable impedance matching network. The tunable impedance matching network includes a tunable inductor coupled to the output node. The tunable inductor includes switches configured to selectively modify an inductance of the tunable inductor. The switches may be configured to modify the tunable inductor to have different inductances in respective testing and functional modes.

公开(公告)号：US20220344288A1

公开(公告)日：2022-10-27

申请号：US17658450

申请日：2022-04-08

Applicant: NXP B.V.

Inventor： Harish Nandagopal ,  Stephane Damien Thuriés ,  Didier Salle

IPC: H01L23/66 ,  H03H7/38 ,  H01L23/498 ,  H01L21/48

Abstract: An integrated circuit device includes an integrated circuit device die and a substrate. The integrated circuit device die includes a plurality of first contact pads. The first contact pads include a pair of first signal contact pads configured to provide a differential signal port of the integrated circuit device die. The differential signal port is configured to operate at a predetermined frequency. The substrate includes a plurality of second contact pads on a first surface of the substrate. The second contact pads are configured to be soldered to a printed circuit board, and include a pair of second signal contact pads. The integrated circuit device die is affixed to a second surface of the substrate via the first contact pads. The substrate includes a pair of circuit paths that each couple one of the first signal contact pads to an associated one of the second signal contact pads. The pair of circuit paths each have a length to provide a half-wave matching network at the predetermined frequency to match a single-ended signal at the pair of second signal pads to the differential signal port.