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    Method of manufacturing IC comprising a bipolar transistor and IC
    2.
    发明授权
    Method of manufacturing IC comprising a bipolar transistor and IC 有权
    制造包括双极晶体管和IC的IC的方法

    公开(公告)号：US09431524B2

    公开(公告)日：2016-08-30

    申请号：US14524365

    申请日：2014-10-27

    Applicant: NXP B.V.

    Inventor： Johannes Josephus Theodorus Marinus Donkers ,  Petrus Hubertus Cornelis Magnee ,  Blandine Duriez ,  Evelyne Gridelet ,  Hans Mertens ,  Tony Vanhoucke

    IPC: H01L31/072 ,  H01L31/109 ,  H01L29/737 ,  H01L21/8249 ,  H01L29/66 ,  H01L27/06 ,  H01L29/10 ,  H01L29/161 ,  H01L29/165 ,  H01L29/45

    CPC classification number: H01L29/7378 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/1004 ,  H01L29/161 ,  H01L29/165 ,  H01L29/456 ,  H01L29/66242

    Abstract: Disclosed is a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate (10) comprising a pair of first isolation regions (12) separated from each other by an active region (11) comprising a collector impurity said bipolar transistor; forming a base layer stack (14, 14′) over said substrate; forming a further stack of a migration layer (15) having a first migration temperature and an etch stop layer (20) over said base layer stack (14); forming a base contact layer (16) having a second migration temperature over the further stack, the second migration temperature being higher than the first migration temperature; etching an emitter window (28) in the base contact layer over the active region, said etching step terminating at the etch stop layer; at least partially removing the etch stop layer, thereby forming cavities (29) extending from the emitter window in between the base contact layer and the redistribution layer; and exposing the resultant structure to the first migration temperature in a hydrogen atmosphere, thereby filling the cavities with the migration layer material. An IC comprising such a bipolar transistor is also disclosed.

    Abstract translation: 公开了一种制造包括双极晶体管的集成电路的方法，所述方法包括提供包括一对第一隔离区（12）的衬底（10），所述第一隔离区（12）通过包含集电极杂质的有源区（11）彼此分离，所述有源区 晶体管 在所述衬底上形成基层叠层（14,14'）; 在所述基层堆叠（14）上方形成具有第一迁移温度和蚀刻停止层（20）的迁移层（15）的另一叠层; 形成具有超过另一堆叠的第二迁移温度的基底接触层（16），所述第二迁移温度高于所述第一迁移温度; 在所述有源区上蚀刻所述基极接触层中的发射极窗口（28），所述蚀刻步骤终止于所述蚀刻停止层; 至少部分地去除所述蚀刻停止层，从而形成从所述基底接触层和所述再分布层之间的所述发射窗延伸的空腔（29） 并在氢气氛中将所得结构暴露于第一迁移温度，由此用迁移层材料填充空腔。 还公开了包括这种双极晶体管的IC。

    Bipolar transistor manufacturing method, bipolar transistor and integrated circuit
    3.
    发明授权
    Bipolar transistor manufacturing method, bipolar transistor and integrated circuit 有权
    双极晶体管制造方法，双极晶体管和集成电路

    公开(公告)号：US08946042B2

    公开(公告)日：2015-02-03

    申请号：US14177880

    申请日：2014-02-11

    Applicant: NXP B.V.

    Inventor： Evelyne Gridelet ,  Johannes Josephus Theodorus Marinus Donkers ,  Tony Vanhoucke ,  Petrus Hubertus Cornelis Magnee ,  Hans Mertens ,  Blandine Duriez

    IPC: H01L29/72 ,  H01L29/732 ,  H01L29/66 ,  H01L29/737

    CPC classification number: H01L29/732 ,  H01L29/66242 ,  H01L29/7378

    Abstract: Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14′), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.

    Abstract translation: 公开了一种制造双极晶体管的方法，包括提供包括通过包括集电极杂质的有源区（11）与第二隔离区分离的第一隔离区（12）的衬底（10） 在所述衬底上形成层堆叠，所述层堆叠包括在所述基底层上方的基底层（14,14'），硅覆盖层（15）和位于所述硅上的硅 - 锗（SiGe）基底接触层（40） 盖层; 蚀刻SiGe基极接触层以在集电极杂质上形成发射极窗口（50），其中硅发射极盖层用作蚀刻停止层; 在发射器窗口中形成侧壁间隔物（22）; 以及用发射体材料（24）填充发射器窗口。 还公开了根据该方法制造的双极晶体管和包括一个或多个这样的双极晶体管的IC。

    METHOD OF PROCESSING A SILICON WAFER AND A SILICON INTEGRATED CIRCUIT
    4.
    发明申请
    METHOD OF PROCESSING A SILICON WAFER AND A SILICON INTEGRATED CIRCUIT 有权
    加工硅晶圆和硅集成电路的方法

    公开(公告)号：US20140167055A1

    公开(公告)日：2014-06-19

    申请号：US14098923

    申请日：2013-12-06

    Applicant: NXP B.V.

    Inventor： Evelyne Gridelet ,  Hans Mertens ,  Michiel Jos van Duuren ,  Tony Vanhoucke ,  Viet Thanh Dinh

    IPC: H01L21/02 ,  H01L27/06

    CPC classification number: H01L27/0623 ,  H01L21/8249 ,  H01L27/11546

    Abstract: Methods and systems for processing a silicon wafer are disclosed. A method includes providing a flash memory region in the silicon wafer and providing a bipolar transistor with a polysilicon external base in the silicon wafer. The flash memory region and the bipolar transistor are formed by depositing a single polysilicon layer common to both the flash memory region and the bipolar transistor.

    Abstract translation: 公开了用于处理硅晶片的方法和系统。 一种方法包括在硅晶片中提供闪速存储区域，并在硅晶片中提供具有多晶硅外部基极的双极晶体管。 闪存区域和双极晶体管通过沉积闪存区域和双极晶体管两者共同的单个多晶硅层来形成。

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