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公开(公告)号：US20150102398A1
公开(公告)日：2015-04-16
申请号：US14575600
申请日：2014-12-18
Applicant: NXP B.V.
Inventor： Henderikus Albert Van der Vegt , Guido Jozef Maria Dormans , Johan Dick Boter , Guoqiao Tao
IPC: H01L21/28 , H01L29/49 , H01L27/115
CPC classification number: H01L29/40114 , G11C16/0416 , H01L27/11517 , H01L29/42324 , H01L29/4916
Abstract: Non-volatile floating gate devices and approaches involve setting or maintaining threshold voltage characteristics relative to thermal processing. In connection with various embodiments, a floating gate device includes a polycrystalline silicon material having an impurity therein. The impurity interacts with the polycrystalline material to resist changes in grain size of the polycrystalline silicon material during thermal processing, and setting charge storage characteristics relative to threshold voltages for the floating gate device.
Abstract translation: 非易失性浮动栅极器件和方法涉及相对于热处理设置或维持阈值电压特性。 关于各种实施例，浮动栅极器件包括其中具有杂质的多晶硅材料。 杂质与多晶材料相互作用以抵抗热处理期间多晶硅材料的晶粒尺寸变化，并且相对于浮动栅极器件的阈值电压设定电荷存储特性。
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公开(公告)号：US20240162314A1
公开(公告)日：2024-05-16
申请号：US18054614
申请日：2022-11-11
Applicant: NXP B.V.
IPC: H01L29/423 , H01L21/28 , H01L29/66 , H01L29/788
CPC classification number: H01L29/42328 , H01L29/40114 , H01L29/66825 , H01L29/7883
Abstract: A multi-time programmable memory cell is provided. The multi-time programmable memory cell includes a floating gate formed on a field oxide region formed on a semiconductor substrate. A control gate is formed on the field oxide region and located parallel to a first portion of the floating gate. A program-erase electrode is formed on the field oxide region and proximate to a second portion of the floating gate. A first well region and a second well region are formed in the semiconductor substrate such that a channel region is formed between the first well region and the second well region with a third portion of the floating gate overlaying the channel region.
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