BIAS-INSENSITIVE TRIGGER CIRCUIT FOR BIGFET ESD SUPPLY PROTECTION
    1.
    发明申请
    BIAS-INSENSITIVE TRIGGER CIRCUIT FOR BIGFET ESD SUPPLY PROTECTION 有权
    用于大电流ESD供电保护的偏置触发电路

    公开(公告)号:US20150049403A1

    公开(公告)日:2015-02-19

    申请号:US13968337

    申请日:2013-08-15

    Applicant: NXP B.V.

    CPC classification number: H02H9/046 H01L27/0285 H03K19/00315

    Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, an ESD protection device for an integrated circuit (IC) device includes a bigFET configured to conduct an ESD current during an ESD event and a trigger device configured to trigger the bigFET during the ESD event. The trigger device includes a slew rate detector configured to detect the ESD event, a driver stage configured to drive the bigFET, and a keep-on latch configured to keep the driver stage turned on to drive a gate terminal of the bigFET with a driving voltage that is insensitive to a pre-bias on a drain terminal or a source terminal of the bigFET. Other embodiments are also described.

    Abstract translation: 描述了静电放电(ESD)保护装置的实施例和操作ESD保护装置的方法。 在一个实施例中,用于集成电路(IC)装置的ESD保护装置包括被配置为在ESD事件期间传导ESD电流的大FET,以及被配置为在ESD事件期间触发大电容器的触发装置。 触发装置包括被配置为检测ESD事件的转换速率检测器,被配置为驱动大FET的驱动器级以及保持驱动级接通以将驱动级导通以驱动大FET的栅极端的驱动电压的保持锁存器 这对于bigFET的漏极端子或源极端子的预偏置不敏感。 还描述了其它实施例。

    Bias-insensitive trigger circuit for bigFET ESD supply protection
    2.
    发明授权
    Bias-insensitive trigger circuit for bigFET ESD supply protection 有权
    用于bigFET ESD供电保护的偏置不敏感触发电路

    公开(公告)号:US09153958B2

    公开(公告)日:2015-10-06

    申请号:US13968337

    申请日:2013-08-15

    Applicant: NXP B.V.

    CPC classification number: H02H9/046 H01L27/0285 H03K19/00315

    Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, an ESD protection device for an integrated circuit (IC) device includes a bigFET configured to conduct an ESD current during an ESD event and a trigger device configured to trigger the bigFET during the ESD event. The trigger device includes a slew rate detector configured to detect the ESD event, a driver stage configured to drive the bigFET, and a keep-on latch configured to keep the driver stage turned on to drive a gate terminal of the bigFET with a driving voltage that is insensitive to a pre-bias on a drain terminal or a source terminal of the bigFET. Other embodiments are also described.

    Abstract translation: 描述了静电放电(ESD)保护装置的实施例和操作ESD保护装置的方法。 在一个实施例中,用于集成电路(IC)装置的ESD保护装置包括被配置为在ESD事件期间传导ESD电流的大FET,以及被配置为在ESD事件期间触发大电容器的触发装置。 触发装置包括被配置为检测ESD事件的转换速率检测器,被配置为驱动大FET的驱动器级以及保持驱动级接通以将驱动级导通以驱动大FET的栅极端的驱动电压的保持锁存器 这对于bigFET的漏极端子或源极端子的预偏置不敏感。 还描述了其它实施例。

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