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公开(公告)号：US20240264618A1
公开(公告)日：2024-08-08
申请号：US18421300
申请日：2024-01-24
申请人： NXP B.V.
摘要： In accordance with a first aspect of the present disclosure, a voltage regulator is provided, comprising: a core and an output stage configured to be coupled to the core, wherein said output stage comprises a set of output stage units; a switch unit comprising a plurality of controllable switches, wherein said controllable switches are configured to couple subsets of the set of output stage units to the core. In accordance with a second aspect of the present disclosure, a corresponding method of configuring a voltage regulator is conceived.
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公开(公告)号：US20200274540A1
公开(公告)日：2020-08-27
申请号：US16282616
申请日：2019-02-22
申请人： NXP B.V.
发明人： Sebastien Darfeuille
摘要： Aspects are directed to an arrangement of circuits configured to generate and correct an output signal relative to a reference signal in response to a direction indication signal. Included in the arrangement of circuits is a phase-frequency detection circuit having logic circuitry configured to respond to the reference signal and a feedback signal by generating and updating the direction indication signal as a function of the logic states of an internal clock signal having risen and fallen. In this context, the feedback signal is generated by a feedback circuit in response to the output signal.
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公开(公告)号：US10819358B2
公开(公告)日：2020-10-27
申请号：US16282616
申请日：2019-02-22
申请人： NXP B.V.
发明人： Sebastien Darfeuille
摘要： Aspects are directed to an arrangement of circuits configured to generate and correct an output signal relative to a reference signal in response to a direction indication signal. Included in the arrangement of circuits is a phase-frequency detection circuit having logic circuitry configured to respond to the reference signal and a feedback signal by generating and updating the direction indication signal as a function of the logic states of an internal clock signal having risen and fallen. In this context, the feedback signal is generated by a feedback circuit in response to the output signal.
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