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公开(公告)号：US20240264618A1
公开(公告)日：2024-08-08
申请号：US18421300
申请日：2024-01-24
申请人： NXP B.V.
摘要： In accordance with a first aspect of the present disclosure, a voltage regulator is provided, comprising: a core and an output stage configured to be coupled to the core, wherein said output stage comprises a set of output stage units; a switch unit comprising a plurality of controllable switches, wherein said controllable switches are configured to couple subsets of the set of output stage units to the core. In accordance with a second aspect of the present disclosure, a corresponding method of configuring a voltage regulator is conceived.
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公开(公告)号：US11789478B2
公开(公告)日：2023-10-17
申请号：US17652065
申请日：2022-02-22
发明人： Zhicheng Deng , Yida Duan
摘要： Power supply noise reduction methods and low drop out (LDO) voltage regulators with capacitively coupled supply noise-reducing components are disclosed. One illustrative voltage regulator includes: a pass transistor having an n-type conduction channel that couples a supply voltage to an output node; an operational amplifier that derives a control signal for the pass transistor from a difference between a reference voltage and a scaled or unscaled voltage of the output node, the control signal being supplied to a gate or base of the pass transistor; a buffer that derives a ripple cancellation signal from the supply voltage; and a coupling capacitor that couples the buffer to the base or gate of the pass transistor to impose the ripple cancellation signal on the control signal.
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公开(公告)号：US20230266783A1
公开(公告)日：2023-08-24
申请号：US17652065
申请日：2022-02-22
发明人： ZHICHENG DENG , YIDA DUAN
摘要： Power supply noise reduction methods and low drop out (LDO) voltage regulators with capacitively coupled supply noise-reducing components are disclosed. One illustrative voltage regulator includes: a pass transistor having an n-type conduction channel that couples a supply voltage to an output node; an operational amplifier that derives a control signal for the pass transistor from a difference between a reference voltage and a scaled or unscaled voltage of the output node, the control signal being supplied to a gate or base of the pass transistor; a buffer that derives a ripple cancellation signal from the supply voltage; and a coupling capacitor that couples the buffer to the base or gate of the pass transistor to impose the ripple cancellation signal on the control signal.
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公开(公告)号：US20180011504A1
公开(公告)日：2018-01-11
申请号：US15710961
申请日：2017-09-21
发明人： Kohei TANAKA , Hidefumi YOSHIDA , Takeshi NOMA , Ryo YONEBAYASHI , Takayuki NISHIYAMA , Mitsuhiro MURATA , Yosuke IWATA
IPC分类号： G05F1/46 , G02F1/1333 , H03K17/042 , H03K17/16 , G02F1/1345 , G02F1/1362 , G02F1/1368 , G09G3/36 , H01L27/12 , H03K17/687 , G02F1/1335 , H01L27/32
CPC分类号： G05F1/467 , G02F1/133308 , G02F1/133514 , G02F1/13454 , G02F1/136213 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0251 , G09G2310/0281 , G09G2310/0286 , G09G2320/0223 , H01L27/124 , H01L27/1255 , H01L27/3272 , H03K17/04206 , H03K17/165 , H03K17/687
摘要： A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
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5.发明授权公开(公告)号：US09329610B2
公开(公告)日：2016-05-03
申请号：US13921033
申请日：2013-06-18
摘要： A biasing circuit for an acoustic transducer is provided with: a voltage-booster stage, which supplies, on a biasing terminal, a boosted voltage for biasing a first terminal of the acoustic transducer; and filtering elements, set between the biasing terminal and the acoustic transducer, for filtering disturbances on the boosted voltage. The biasing circuit is further provided with switches, which can be actuated so as to connect the first terminal to the biasing terminal of the voltage-booster stage, directly during a start-up step of the biasing circuit, and through the filtering elements at the end of the start-up step.
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公开(公告)号：US20140167717A1
公开(公告)日：2014-06-19
申请号：US14089005
申请日：2013-11-25
发明人： Kouichi OOGA
IPC分类号： H02M3/158
摘要： The present invention is directed to sufficiently reduce the level of EMI which occurs from a switching FET in a DC/DC converter and minimize deterioration in efficiency of a power supply. A DC/DC converter includes a switching circuit for driving a switching FET for increasing or decreasing voltage, and a switching circuit for driving a ringing frequency changing circuit. One end of a capacitor is connected to a drain of the switching FET for increasing or decreasing voltage, and the other end of the capacitor is connected to a drain of an FET for the ringing frequency changing circuit. A source of the FET for the ringing frequency changing circuit is connected to GND, and a control circuit is provided which makes the ringing frequency changing circuit valid so that a ringing frequency becomes low only in a ringing frequency component exerting large influence on deterioration in EMI.
摘要翻译： 本发明旨在充分降低由DC / DC转换器中的开关FET产生的EMI的电平，并使电源效率的降低最小化。 DC / DC转换器包括用于驱动用于增加或减少电压的开关FET的开关电路和用于驱动振铃频率改变电路的开关电路。 电容器的一端连接到用于增加或减小电压的开关FET的漏极，并且电容器的另一端连接到用于振铃频率改变电路的FET的漏极。 用于振铃频率改变电路的FET的源极连接到GND，并且提供控制电路，其使得振铃频率改变电路有效，使得振铃频率仅在对EMI的劣化产生较大影响的振铃频率分量中变低 。
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公开(公告)号：US20140125301A1
公开(公告)日：2014-05-08
申请号：US14073323
申请日：2013-11-06
发明人： John HANDFORD , Stuart HARLEY
IPC分类号： G05F1/46
CPC分类号： G05F1/567 , G05F1/462 , G05F1/467 , G05F1/468 , H02M2001/327
摘要： Control circuitry for stabilising a DC voltage outputted by a DC power supply against changes in ambient temperature. The control circuitry includes: measurement circuitry configured to output a measurement voltage representative of a DC voltage outputted by a DC power supply; reference circuitry configured to output a reference voltage; and comparison circuitry configured to compare the measurement voltage with the reference voltage and, based on the comparison, output a control signal for controlling the DC voltage outputted by the DC power supply. At least one temperature-sensitive component of the control circuitry is located in an enclosure configured to maintain a substantially constant temperature within the enclosure.
摘要翻译： 控制电路，用于稳定直流电源输出的直流电压，防止环境温度的变化。 控制电路包括：测量电路，被配置为输出表示由直流电源输出的直流电压的测量电压; 参考电路，被配置为输出参考电压; 以及比较电路，其被配置为将所述测量电压与所述参考电压进行比较，并且基于所述比较，输出用于控制由所述直流电源输出的直流电压的控制信号。 控制电路的至少一个温度敏感部件位于被配置为在外壳内保持基本上恒定的温度的外壳中。
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公开(公告)号：US07847529B2
公开(公告)日：2010-12-07
申请号：US11847416
申请日：2007-08-30
申请人： Seongwon Kim
发明人： Seongwon Kim
IPC分类号： G05F1/59
CPC分类号： G05F1/467
摘要： A linear voltage regulator is provided. The linear voltage regulator includes a first circuit configured to receive the first voltage from a voltage source and to remove frequency components of the first voltage in a first frequency range to obtain an output voltage at a primary output node. The linear voltage regulator further includes a second circuit having first and second inverters electrically coupled to the primary output node of the first circuit. The second circuit is configured to receive the output voltage and to remove frequency components of the output voltage in a second frequency range. The second frequency range is greater than the first frequency range.
摘要翻译： 提供线性稳压器。 线性稳压器包括被配置为从电压源接收第一电压并且去除第一频率范围中的第一电压的频率分量以获得主输出节点处的输出电压的第一电路。 线性电压调节器还包括具有电耦合到第一电路的主输出节点的第一和第二反相器的第二电路。 第二电路被配置为接收输出电压并且在第二频率范围中去除输出电压的频率分量。 第二个频率范围大于第一个频率范围。
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公开(公告)号：US06778005B2
公开(公告)日：2004-08-17
申请号：US10330818
申请日：2002-12-27
IPC分类号： G05F110
CPC分类号： G05F1/467
摘要： The present invention improves on the topology of a conventional current source by interposing an RC circuit and additional MOS between the output of a buffer and the output of the current source. The topology of the present invention advantageously provides a clean current output by shunting noise to ground.
摘要翻译： 本发明通过在缓冲器的输出和电流源的输出之间插入RC电路和附加MOS来改进传统电流源的拓扑结构。 本发明的拓扑结构有利地通过将噪声分流到地来提供干净的电流输出。
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10.发明授权公开(公告)号：US06762596B2
公开(公告)日：2004-07-13
申请号：US10241519
申请日：2002-09-12
申请人： Naruichi Yokogawa , Takahiro Inoue
发明人： Naruichi Yokogawa , Takahiro Inoue
IPC分类号： G05F316
CPC分类号： G05F1/467
摘要： A direct current input power supply voltage Vcc is outputted to the load side via a PNP type transistor having a small Vce. A base thereof is driven by a base current from which noise is removed in a power source noise removing circuit. An input to the noise removing circuit is produced by shifting a level from the Vcc side by a direct current level shift circuit. Since an output voltage Vs varies with reference to Vcc and a voltage drop is relatively small owing to the transistor, an operation voltage on the load side can be ensured. The noise removing circuit is constituted by a gm amplifier. In order to increase a noise removing rate at low frequencies, by setting gm of a time constant C/gm to a small value, it is possible to set a capacity to a value which allows integration.
摘要翻译： 通过具有小Vce的PNP型晶体管将直流输入电源电压Vcc输出到负载侧。 其基极由电源噪声去除电路中的噪声被去除的基极电流驱动。 噪声去除电路的输入是通过直流电平移位电路从Vcc侧移位电平来产生的。 由于输出电压Vs参考Vcc而变化，并且由于晶体管而导致的电压降相对较小，因此可以确保负载侧的工作电压。 噪声去除电路由gm放大器构成。 为了增加低频噪声去除率，通过将时间常数C / gm的gm设定为小的值，可以将容量设定为允许积分的值。
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