Differential output circuits with configurable harmonic reduction circuits and methods of operation thereof

    公开(公告)号:US11777538B2

    公开(公告)日:2023-10-03

    申请号:US17649332

    申请日:2022-01-28

    申请人: NXP USA, Inc.

    IPC分类号: H04B1/04 H03F3/45 H04B17/13

    摘要: An electronic circuit includes a differential output circuit that produces a differential output signal at a differential output. A primary winding of a balun has a first balun terminal coupled to a first differential output terminal, and a second balun terminal coupled to a second differential output terminal. A configurable harmonic reduction circuit includes first and second configurable shunt capacitance circuits coupled between the first differential output terminal or the second differential output terminal, respectively, and a ground reference node. A control circuit receives tuning data associated with a calibrated tuning state. The tuning data indicates a first and second calibrated capacitance values, which are unequal, for the first and second configurable shunt capacitance circuits, respectively. The control circuit controls the first configurable shunt capacitance circuit to have the first calibrated capacitance value, and controls the second configurable shunt capacitance circuit to have the second calibrated capacitance value.

    DIFFERENTIAL OUTPUT CIRCUITS WITH CONFIGURABLE HARMONIC REDUCTION CIRCUITS AND METHODS OF OPERATION THEREOF

    公开(公告)号:US20230246658A1

    公开(公告)日:2023-08-03

    申请号:US17649332

    申请日:2022-01-28

    申请人: NXP USA, Inc.

    IPC分类号: H04B1/04 H03F3/45 H04B17/13

    摘要: An electronic circuit includes a differential output circuit that produces a differential output signal at a differential output. A primary winding of a balun has a first balun terminal coupled to a first differential output terminal, and a second balun terminal coupled to a second differential output terminal. A configurable harmonic reduction circuit includes first and second configurable shunt capacitance circuits coupled between the first differential output terminal or the second differential output terminal, respectively, and a ground reference node. A control circuit receives tuning data associated with a calibrated tuning state. The tuning data indicates a first and second calibrated capacitance values, which are unequal, for the first and second configurable shunt capacitance circuits, respectively. The control circuit controls the first configurable shunt capacitance circuit to have the first calibrated capacitance value, and controls the second configurable shunt capacitance circuit to have the second calibrated capacitance value.