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公开(公告)号：US20210167735A1
公开(公告)日：2021-06-03
申请号：US16740417
申请日：2020-01-11
Applicant: NXP USA, Inc.
Inventor： Faiza Baroudi , Damien Scatamacchia , Xavier Hue
Abstract: The embodiments described herein can provide radio frequency (RF) amplifiers, and particularly Doherty power amplifiers. The Doherty amplifiers include a carrier amplifier, at least one peaking amplifier, and a combiner. In general, these Doherty amplifiers include an adaptive impedance transformation that provides a phase shift and modifies the impedance presented to one or more peaking amplifier(s) in the Doherty amplifier. Specifically, the combiner includes at least a first impedance transformer, second impedance transformer, and a third impedance transformer coupled between the first impedance transformer and the second impedance transformer. In accordance with the embodiments described herein, the third impedance transformer is configured to both provide both a phase shift and an impedance transformation.
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2.发明申请公开(公告)号：US20220021343A1
公开(公告)日：2022-01-20
申请号：US17024612
申请日：2020-09-17
Applicant: NXP USA, Inc.
Inventor： Xavier Hue , Olivier Lembeye , Pascal Peyrot
Abstract: Aspects of the subject disclosure may include a power splitter. The power splitter can include a first splitter branch having a first amplifier with passive components, a second splitter branch having a second amplifier with passive components. The first splitter branch is substantially electrically isolated from the second splitter branch by configuring the first and second splitter branches to have similar phase delays. Outputs of the power splitter can be electrically coupled to the multi-stage amplifier. The power splitter can be manufactured on a single semiconductor die or integrally formed on the same semiconductor die with other circuits such as the multi-stage amplifier. Other embodiments are disclosed.
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公开(公告)号：US20200186097A1
公开(公告)日：2020-06-11
申请号：US16685666
申请日：2019-11-15
Applicant: NXP USA, Inc.
Inventor： Xavier Hue , Margaret Szymanowski , Xin Fu
Abstract: A multiple-path amplifier (e.g., a Doherty amplifier) includes a semiconductor die, a radio frequency (RF) signal input terminal, a combining node structure integrally formed with the semiconductor die, and first and second amplifiers (e.g., main and peaking amplifiers) integrally formed with the die. Inputs of the first and second amplifiers are electrically coupled to the RF signal input terminal. A plurality of wirebonds is connected between an output of the first amplifier and the combining node structure. An output of the second amplifier is electrically coupled to the combining node structure (e.g., through a conductive path with a negligible phase delay). A phase delay between the outputs of the first and second amplifiers is substantially equal to 90 degrees. The second amplifier may be divided into two amplifier portions that are physically located on opposite sides of the first amplifier.
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公开(公告)号：US20210175854A1
公开(公告)日：2021-06-10
申请号：US17112005
申请日：2020-12-04
Applicant: NXP USA, Inc.
Inventor： Xavier Hue , Margaret a. Szymanowski , Xin Fu
Abstract: A multiple-path amplifier (e.g., a Doherty amplifier) includes first and second transistors (e.g., main and peaking transistors) with first and second output terminals, respectively, all of which is integrally-formed with a semiconductor die. A signal path through the second transistor extends in a direction from a control terminal of the second transistor to the second output terminal, where the second output terminal corresponds to or is closely electrically coupled to a combining node. The amplifier also includes an integrated phase delay circuit that is configured to apply an overall phase delay (e.g., 90 degrees) to a signal carried between the first and second output terminals. The integrated phase delay circuit includes delay circuit wirebonds coupled between the first and second output terminals, and the delay circuit wirebonds extend in a third direction that is angularly offset from (e.g., perpendicular to) the second direction.
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公开(公告)号：US11277098B2
公开(公告)日：2022-03-15
申请号：US16685666
申请日：2019-11-15
Applicant: NXP USA, Inc.
Inventor： Xavier Hue , Margaret Szymanowski , Xin Fu
IPC: H03F3/14 , H03F1/02 , H01L23/66 , H01L23/00 , H03F3/21 , H03F3/213 , H01L23/522 , H01L23/528
Abstract: A multiple-path amplifier (e.g., a Doherty amplifier) includes a semiconductor die, a radio frequency (RF) signal input terminal, a combining node structure integrally formed with the semiconductor die, and first and second amplifiers (e.g., main and peaking amplifiers) integrally formed with the die. Inputs of the first and second amplifiers are electrically coupled to the RF signal input terminal. A plurality of wirebonds is connected between an output of the first amplifier and the combining node structure. An output of the second amplifier is electrically coupled to the combining node structure (e.g., through a conductive path with a negligible phase delay). A phase delay between the outputs of the first and second amplifiers is substantially equal to 90 degrees. The second amplifier may be divided into two amplifier portions that are physically located on opposite sides of the first amplifier.
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Patent Agency Ranking
公开(公告)号：US20200186096A1
公开(公告)日：2020-06-11
申请号：US16685531
申请日：2019-11-15
Applicant: NXP USA, Inc.
Inventor： Xavier Hue , Margaret Szymanowski , Xin Fu
Abstract: A power amplifier includes a semiconductor die, and an amplifier and bias circuit integrally formed with the semiconductor die. The die has opposed first and second sides, and a device bisection line extends between the first and second sides. The bias circuit includes a multi-point input terminal with first and second terminals that are electrically connected through a conductive path that extends across the device bisection line, and one or more bias circuit components connected between the multi-point input terminal and the amplifier. The amplifier may include a field effect transistor (FET) with gate and drain terminals, and the bias circuit component(s) are electrically connected between the multi-point input terminal and the gate terminal. In addition or alternatively, the bias circuit component(s) are electrically connected between a multi-point input terminal and the drain terminal. The one or more components may include a resistor-divider circuit.
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7.发明公开公开(公告)号：US20230232528A1
公开(公告)日：2023-07-20
申请号：US18156972
申请日：2023-01-19
Applicant: NXP USA, Inc.
Inventor： Yu-Ting David Wu , Pascal Peyrot , Xavier Hue
CPC classification number: H05K1/0236 , H03F3/195 , H03F3/213 , H01L23/66 , H05K1/0209 , H05K1/0206 , H01L2223/6655 , H01L2223/6611 , H01L2223/6622 , H01L2223/6672 , H03F1/0288
Abstract: Power amplifier systems including power amplifier modules (PAMs) and electromagnetic bandgap (EBG) isolation structures are disclosed. In embodiments, the power amplifier system includes a printed circuit board (PCB) and a PAM mounted to the PCB in an inverted orientation. The PCB has a PCB frontside on which a PAM mount region is provided, and radio frequency (RF) input and output bondpads. The PAM includes a topside input/output interface having RF input and output terminals electrically coupled to the RF input and output pads, respectively. The power amplifier system further includes a first EBG isolation structure containing a first grounded EBG cell array, at least a portion of which is located within or beneath the PAM mount region.
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8.发明授权公开(公告)号：US11705870B2
公开(公告)日：2023-07-18
申请号：US17024612
申请日：2020-09-17
Applicant: NXP USA, Inc.
Inventor： Xavier Hue , Olivier Lembeye , Pascal Peyrot
CPC classification number: H03F1/0288 , H03F1/42 , H03F3/21 , H03F2200/36 , H03F2200/451
Abstract: Aspects of the subject disclosure may include a power splitter. The power splitter can include a first splitter branch having a first amplifier with passive components, a second splitter branch having a second amplifier with passive components. The first splitter branch is substantially electrically isolated from the second splitter branch by configuring the first and second splitter branches to have similar phase delays. Outputs of the power splitter can be electrically coupled to the multi-stage amplifier. The power splitter can be manufactured on a single semiconductor die or integrally formed on the same semiconductor die with other circuits such as the multi-stage amplifier. Other embodiments are disclosed.
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公开(公告)号：US11621673B2
公开(公告)日：2023-04-04
申请号：US16830787
申请日：2020-03-26
Applicant: NXP USA, Inc.
Inventor： Jean-Christophe Nanan , David James Dougherty , Scott Duncan Marshall , Lakshminarayan Viswanathan , Xavier Hue
Abstract: Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.
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公开(公告)号：US11522499B2
公开(公告)日：2022-12-06
申请号：US17112005
申请日：2020-12-04
Applicant: NXP USA, Inc.
Inventor： Xavier Hue , Margaret A. Szymanowski , Xin Fu
Abstract: A multiple-path amplifier (e.g., a Doherty amplifier) includes first and second transistors (e.g., main and peaking transistors) with first and second output terminals, respectively, all of which is integrally-formed with a semiconductor die. A signal path through the second transistor extends in a direction from a control terminal of the second transistor to the second output terminal, where the second output terminal corresponds to or is closely electrically coupled to a combining node. The amplifier also includes an integrated phase delay circuit that is configured to apply an overall phase delay (e.g., 90 degrees) to a signal carried between the first and second output terminals. The integrated phase delay circuit includes delay circuit wirebonds coupled between the first and second output terminals, and the delay circuit wirebonds extend in a third direction that is angularly offset from (e.g., perpendicular to) the second direction.
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