公开(公告)号：US20220182022A1

公开(公告)日：2022-06-09

申请号：US17110568

申请日：2020-12-03

Applicant: NXP USA, Inc.

Inventor： Joseph Gerard Schultz ,  Yu-Ting David Wu ,  Nick Yang

IPC: H03F3/195 ,  H03F3/24 ,  H03F1/56 ,  H03F1/02 ,  H01L23/60 ,  H01L23/66 ,  H01L23/00

Abstract: An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

公开(公告)号：US10861806B2

公开(公告)日：2020-12-08

申请号：US16805128

申请日：2020-02-28

Applicant: NXP USA, Inc.

Inventor： Yu-Ting David Wu ,  Enver Krvavac ,  Jeffrey Kevin Jones

IPC: H03F3/14 ,  H01L23/66 ,  H01L23/13 ,  H01L23/538 ,  H01L23/00 ,  H01L25/07 ,  H03F1/02 ,  H03F3/19 ,  H03F3/21 ,  H01L21/48 ,  H01L25/00 ,  H03F1/07

Abstract: An embodiment of a module (e.g., an amplifier module) includes a substrate, a transmission line, and a ground plane height variation structure. The substrate is formed from a plurality of dielectric material layers, and has a mounting surface and a second surface opposite the mounting surface. A plurality of non-overlapping zones is defined at the mounting surface. The transmission line is coupled to the substrate and is located within a first zone of the plurality of non-overlapping zones. The ground plane height variation structure extends from the second surface into the substrate within the first zone. The ground plane height variation structure underlies the transmission line, a portion of the substrate is present between the upper boundary and the transmission line, and the ground plane height variation structure includes a conductive path between an upper boundary of the ground plane height variation structure and the second surface.

公开(公告)号：US11145609B2

公开(公告)日：2021-10-12

申请号：US16704283

申请日：2019-12-05

Applicant: NXP USA, Inc.

Inventor： Joseph Gerard Schultz ,  Jeffrey Kevin Jones ,  Elie A. Maalouf ,  Yu-Ting David Wu ,  Nick Yang

IPC: H01L23/66 ,  H01L23/495 ,  H03F1/02 ,  H03F3/21 ,  H03F3/24 ,  H05K1/02

Abstract: An embodiment of a Doherty amplifier includes a module substrate, first and second surface-mount devices coupled to a top surface of the module substrate, and an impedance inverter line assembly. The first and second surface-mount devices include first and second amplifier dies, respectively. The impedance inverter line assembly is electrically connected between outputs of the first and second amplifier dies. The impedance inverter line assembly includes an impedance inverter line coupled to the module substrate, a first lead of the first surface-mount device coupled between the first amplifier die output and a proximal end of the impedance inverter line, and a second lead of the second surface-mount device coupled between the second amplifier die output and a distal end of the impedance inverter line. According to a further embodiment, the impedance inverter line assembly has a 90 degree electrical length at a fundamental operational frequency of the Doherty amplifier.

公开(公告)号：US11128269B2

公开(公告)日：2021-09-21

申请号：US16718679

申请日：2019-12-18

Applicant: NXP USA, Inc.

Inventor： Elie A. Maalouf ,  Yu-Ting David Wu ,  Lu Wang ,  Nick Yang

IPC: H03F3/191 ,  H03F3/213 ,  H01L23/66 ,  H03F1/02 ,  H03F1/56 ,  H03F3/195 ,  H04B1/04

Abstract: An amplifier includes a driver stage amplifier transistor and a final stage amplifier transistor, which are integrated in a semiconductor die. The driver stage amplifier transistor has a driver stage input, a driver stage output, and an output impedance, and the driver stage amplifier transistor is configured to operate using a first bias voltage at the driver stage output. The final stage amplifier transistor has a final stage input, a final stage output, and an input impedance. The final stage input is electrically coupled to the driver stage output. The final stage amplifier transistor is configured to operate using a second bias voltage at the final stage output, and the second bias voltage is at least twice as large as the first bias voltage.

公开(公告)号：US20180175802A1

公开(公告)日：2018-06-21

申请号：US15846162

申请日：2017-12-18

Applicant: NXP USA, Inc.

Inventor： Yu-Ting David Wu ,  Enver Krvavac ,  Joseph Gerard Schultz ,  Nick Yang ,  Damon G. Holmes ,  Shishir Ramasare Shukla ,  Jeffrey Kevin Jones ,  Elie A. Maalouf ,  Mario Bokatius

IPC: H03F1/02 ,  H01L27/06 ,  H01L23/66 ,  H03F3/195 ,  H03F1/56 ,  H03F3/213

CPC classification number: H03F1/0288 ,  H01L23/66 ,  H01L27/0629 ,  H01L27/085 ,  H01L2223/6611 ,  H01L2223/6616 ,  H01L2223/6655 ,  H01L2223/6677 ,  H03F1/56 ,  H03F1/565 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/411 ,  H03F2200/451

Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.

公开(公告)号：US12119300B2

公开(公告)日：2024-10-15

申请号：US17663181

申请日：2022-05-12

Applicant: NXP USA, Inc.

Inventor： Humayun Kabir ,  Ibrahim Khalil ,  Daniel Joseph Lamey ,  Yu-Ting David Wu

IPC: H01L25/10 ,  H01L21/8234 ,  H01L23/528 ,  H01L27/088 ,  H01L29/40 ,  H01L29/417 ,  H03K17/687

CPC classification number: H01L23/528 ,  H01L21/823475 ,  H01L25/105 ,  H01L27/088 ,  H01L29/401 ,  H01L29/41725 ,  H03K17/6871

Abstract: A device having a reference transistor fabricated within the same semiconductor substrate as a primary transistor (e.g., configured for use in a radiofrequency amplifier or other active circuit) has a shared metallization area coupled to a current terminal of both transistors configured to shield a control terminal of the reference transistor from coupling of alternating current interference from alternating currents within the primary transistor.

公开(公告)号：US20210175186A1

公开(公告)日：2021-06-10

申请号：US16704283

申请日：2019-12-05

Applicant: NXP USA, Inc.

Inventor： Joseph Gerard Schultz ,  Jeffrey Kevin Jones ,  Elie A. Maalouf ,  Yu-Ting David Wu ,  Nick Yang

IPC: H01L23/66 ,  H03F1/02 ,  H01L23/495

Abstract: An embodiment of a Doherty amplifier includes a module substrate, first and second surface-mount devices coupled to a top surface of the module substrate, and an impedance inverter line assembly. The first and second surface-mount devices include first and second amplifier dies, respectively. The impedance inverter line assembly is electrically connected between outputs of the first and second amplifier dies. The impedance inverter line assembly includes an impedance inverter line coupled to the module substrate, a first lead of the first surface-mount device coupled between the first amplifier die output and a proximal end of the impedance inverter line, and a second lead of the second surface-mount device coupled between the second amplifier die output and a distal end of the impedance inverter line. According to a further embodiment, the impedance inverter line assembly has a 90 degree electrical length at a fundamental operational frequency of the Doherty amplifier.

公开(公告)号：US10250197B1

公开(公告)日：2019-04-02

申请号：US15804268

申请日：2017-11-06

Applicant: NXP USA, Inc.

Inventor： Joseph Schultz ,  Enver Krvavac ,  Yu-Ting David Wu ,  Nick Yang ,  Jeffrey Jones ,  Mario Bokatius ,  Ricardo Uscola

IPC: H03F1/02 ,  H03F1/56 ,  H03F3/195 ,  H03F3/213 ,  H03F3/04 ,  H01L23/66

Abstract: A multiple-stage amplifier includes a driver stage die and a final stage die. The final stage die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a first transistor. The driver stage die includes another type of semiconductor substrate (e.g., a silicon substrate), a second transistor, and one or more secondary circuits that are electrically coupled to a control terminal of the first transistor. A connection (e.g., a wirebond array or other DC-coupled connection) is electrically coupled between an RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die. The secondary circuit(s) of the driver stage die include a final stage bias circuit and/or a final stage harmonic control circuit, which are electrically connected to the final stage die through various connections.

公开(公告)号：US20250125780A1

公开(公告)日：2025-04-17

申请号：US18488957

申请日：2023-10-17

Applicant: NXP USA, Inc.

Inventor： Joseph Gerard Schultz ,  Yu-Ting David Wu ,  Michelle Nicole Corn ,  Ngai-Ming Lau ,  Thomas William Raimbault

IPC: H03F3/24 ,  H03F1/02 ,  H03F1/26

Abstract: A reference transistor forms part of a measurement circuit coupled to bias control circuitry that is configured to operate a primary transistor at a desired operating point by providing appropriate DC bias voltages to the control terminal of the primary transistor and one or more current terminals of the primary transistor based upon an output of the measurement circuit generated using the reference transistor. A dissipative circuit element is electrically coupled to the reference transistor and is configured to cause the reference transistor to exhibit negative gain at a drain terminal (or other output node) of the reference transistor with respect to alternating-current (AC) electrical signals which may be unintentionally coupled to the gate (or other input node) of the reference transistor.

公开(公告)号：US12088255B2

公开(公告)日：2024-09-10

申请号：US17344789

申请日：2021-06-10

Applicant: NXP USA, Inc.

Inventor： Nick Yang ,  Yu-Ting David Wu ,  Joseph Gerard Schultz

IPC: H03F3/45 ,  H03F1/02 ,  H03F3/21

CPC classification number: H03F1/0288 ,  H03F3/211

Abstract: A Doherty amplifier includes a peaking amplifier, a carrier amplifier, and a combining node electrically connected to the carrier amplifier and the peaking amplifier. The Doherty amplifier includes a harmonic control circuit coupled to the combining node. The harmonic control circuit includes an inductor and a capacitor and the inductor and capacitor are connected in series between the first current conducting terminal and a ground reference node. An inductance value of the inductor of the harmonic control circuit and a capacitance value of the capacitor of the harmonic control circuit are selected to terminate second order harmonic components of a fundamental frequency of a signal generated by the carrier amplifier.