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    Parallel processing logic circuit for sensor signal processing
    2.
    发明授权
    Parallel processing logic circuit for sensor signal processing 失效
    用于传感器信号处理的并行处理逻辑电路

    公开(公告)号：US07394052B2

    公开(公告)日：2008-07-01

    申请号：US10208527

    申请日：2002-07-29

    申请人： Koji Fujii ,  Satoshi Shigematsu ,  Hiroki Morimura ,  Mamoru Nakanishi

    发明人： Koji Fujii ,  Satoshi Shigematsu ,  Hiroki Morimura ,  Mamoru Nakanishi

    IPC分类号： H01L27/00 ,  H04N5/235

    CPC分类号： G06F15/8023

    摘要： A parallel processing logic circuit for sensor signal processing includes sensors and processing units. The sensor and the processing unit are integrated in the same pixel and arranged in a matrix. The processing unit contains a logic structure that consists of a register and a combinational logic function to execute pixel-parallel processing, based on binary data for a sensor, other processing units, and itself. The combinational logic function performs only a predetermined logic function and its dual one exclusively, thereby sharing the circuit resource and reducing the size of the processing unit. The register focusing on compactness also contributes to the small unit.

    摘要翻译： 用于传感器信号处理的并行处理逻辑电路包括传感器和处理单元。 传感器和处理单元集成在相同的像素中并排列成矩阵。 该处理单元包含一个逻辑结构，该逻辑结构由一个寄存器和一个组合逻辑功能组成，用于执行像素并行处理，基于传感器的二进制数据，其他处理单元及其自身。 组合逻辑功能仅执行预定的逻辑功能及其双重功能，从而共享电路资源并减小处理单元的大小。 专注于紧凑性的寄存器也有助于小型单元。

    Waveform shaping circuit
    3.
    发明申请
    Waveform shaping circuit 失效
    波形整形电路

    公开(公告)号：US20050258877A1

    公开(公告)日：2005-11-24

    申请号：US10505629

    申请日：2004-01-21

    申请人： Hiroki Morimura ,  Toshishige Shimamura ,  Koji Fujii ,  Satoshi Shigematsu ,  Yukio Okazaki ,  Katsuyuki Machida

    发明人： Hiroki Morimura ,  Toshishige Shimamura ,  Koji Fujii ,  Satoshi Shigematsu ,  Yukio Okazaki ,  Katsuyuki Machida

    IPC分类号： H03K5/08 ,  H03K5/1534 ,  H03K17/22 ,  H03K17/30 ,  H03B1/00

    CPC分类号： H03K5/082 ,  H03K5/1534 ,  H03K17/223 ,  H03K17/302

    摘要： A first control potential setting means (1) generates a first control potential (N2) which reverses the magnitude relationship with a second control potential (N3) when an input signal (IN) reaches the vicinity of a logical threshold value. A second control potential setting means (2) generates the second control potential (N3) which changes in the same direction as the input signal (IN), in accordance with a change in input signal (IN). An output means (3) includes transistors (Q5, Q6), and generates an output signal (OUT) having a predetermined potential on the basis of the first control potential (N2), the second control potential (N3), and a reset signal (RSET). A reset means (4) turns off the transistor (Q6) while a waveform shaping circuit is in operation.

    摘要翻译： 当输入信号（IN）达到逻辑门限值附近时，第一控制电位设定装置（1）产生使与第二控制电位（N 3）的大小关系相反的第一控制电位（N 2）。 第二控制电位设定装置（2）根据输入信号（IN）的变化产生与输入信号（IN）沿相同方向变化的第二控制电位（N 3）。 输出装置（3）包括晶体管（Q 5，Q 6），并且基于第一控制电位（N 2），第二控制电位（N 3）产生具有预定电位的输出信号（OUT） 和复位信号（RSET）。 当波形整形电路处于工作状态时，复位装置（4）关断晶体管（Q 6）。

    Waveform shaping circuit
    4.
    发明授权
    Waveform shaping circuit 失效
    波形整形电路

    公开(公告)号：US07019563B2

    公开(公告)日：2006-03-28

    申请号：US10505629

    申请日：2004-01-21

    申请人： Hiroki Morimura ,  Toshishige Shimamura ,  Koji Fujii ,  Satoshi Shigematsu ,  Yukio Okazaki ,  Katsuyuki Machida

    发明人： Hiroki Morimura ,  Toshishige Shimamura ,  Koji Fujii ,  Satoshi Shigematsu ,  Yukio Okazaki ,  Katsuyuki Machida

    IPC分类号： H03B1/00

    CPC分类号： H03K5/082 ,  H03K5/1534 ,  H03K17/223 ,  H03K17/302

    摘要： A first control potential setting means (1) generates a first control potential (N2) which reverses the magnitude relationship with a second control potential (N3) when an input signal (IN) reaches the vicinity of a logical threshold value. A second control potential setting means (2) generates the second control potential (N3) which changes in the same direction as the input signal (IN), in accordance with a change in input signal (IN). An output means (3) includes transistors (Q5, Q6), and generates an output signal (OUT) having a predetermined potential on the basis of the first control potential (N2), the second control potential (N3), and a reset signal (RSET). A reset means (4) turns off the transistor (Q6) while a waveform shaping circuit is in operation.

    摘要翻译： 当输入信号（IN）达到逻辑门限值附近时，第一控制电位设定装置（1）产生使与第二控制电位（N 3）的大小关系相反的第一控制电位（N 2）。 第二控制电位设定装置（2）根据输入信号（IN）的变化产生与输入信号（IN）沿相同方向变化的第二控制电位（N 3）。 输出装置（3）包括晶体管（Q 5，Q 6），并且基于第一控制电位（N 2），第二控制电位（N 3）产生具有预定电位的输出信号（OUT） 和复位信号（RSET）。 当波形整形电路处于工作状态时，复位装置（4）关断晶体管（Q 6）。

    Image Forming Apparatus and Method of Detecting Index for Use in Image Forming Apparatus
    7.
    发明申请
    Image Forming Apparatus and Method of Detecting Index for Use in Image Forming Apparatus 有权
    图像形成装置及检测图像形成装置使用指标的方法

    公开(公告)号：US20130112530A1

    公开(公告)日：2013-05-09

    申请号：US13666645

    申请日：2012-11-01

    申请人： Koji Fujii

    发明人： Koji Fujii

    IPC分类号： B65G43/00

    CPC分类号： G03G15/1615 ,  G03G2215/00156 ,  G03G2215/0132

    摘要： An image forming apparatus includes a belt, a detector, a determining section, a skew correcting section, and a storage section. The belt is stretched around rollers and provided with an index. The detector provides an output value. The determining section determines the index that is passing through the detection region on the basis of a change in the output value, the change exceeding a threshold. The skew correcting section performs control relating to skew correction of inclining the roller and correcting the position of the belt. The storage section stores the threshold having a value between the measured maximum amount of change in the output value when the skew correcting section inclines the roller at the maximum angle and the amount of change in the output value resulting from the index when the index arrives at or passes through the detector.

    摘要翻译： 图像形成装置包括带，检测器，确定部，偏斜校正部和存储部。 皮带在辊子周围拉伸，并提供了一个指数。 检测器提供输出值。 确定部分基于输出值的变化来确定正在通过检测区域的索引，该变化超过阈值。 偏斜校正部执行与倾斜辊的偏斜校正和矫正带的位置的控制。 存储部存储当偏斜校正部倾斜最大角度的辊时的测量的最大变化量与当指标到达时的指标产生的输出值的变化量之间的值的阈值 或通过检测器。

    Image forming apparatus having a photoconductive drum
    8.
    发明授权
    Image forming apparatus having a photoconductive drum 有权
    具有感光鼓的图像形成装置

    公开(公告)号：US07979011B2

    公开(公告)日：2011-07-12

    申请号：US12546845

    申请日：2009-08-25

    申请人： Kensuke Fujihara ,  Akane Tokushige ,  Tamotsu Shimizu ,  Ryota Maeda ,  Koji Fujii

    发明人： Kensuke Fujihara ,  Akane Tokushige ,  Tamotsu Shimizu ,  Ryota Maeda ,  Koji Fujii

    IPC分类号： G03G15/09

    CPC分类号： G03G15/751 ,  G03G15/065 ,  G03G15/0813 ,  G03G2215/0634

    摘要： An image forming apparatus that includes: a photoconductive drum; a developing roller that is arranged opposite the photoconductive drum and that carries toner; a detecting portion that detects an occurrence of electrical discharge between the developing roller and the photoconductive drum; a control portion that controls the apparatus, that receives an output of the detecting portion and then recognizes the occurrence of the electrical discharge; a direct voltage applying portion that is connected to the developing roller; and an alternating voltage applying portion is disclosed herein.

    摘要翻译： 一种图像形成装置，包括：感光鼓; 显影辊，其布置成与感光鼓相对并且承载调色剂; 检测部，其检测所述显影辊和所述感光鼓之间的放电的发生; 控制部，其控制所述装置，所述控制部接收所述检测部的输出，然后识别所述放电的发生; 连接到显影辊的直流施加部分; 并且本文公开了交流电压施加部分。

    Joining equipment
    9.
    发明授权
    Joining equipment 有权

    公开(公告)号：US06518536B2

    公开(公告)日：2003-02-11

    申请号：US09822990

    申请日：2001-03-30

    申请人： Koji Fujii ,  Jing Bo Wang ,  Mamoru Watanabe ,  Yasuhiro Goto ,  Makoto Ryudo ,  Kinichi Matsuyama

    发明人： Koji Fujii ,  Jing Bo Wang ,  Mamoru Watanabe ,  Yasuhiro Goto ,  Makoto Ryudo ,  Kinichi Matsuyama

    IPC分类号： B23K1124

    CPC分类号： B23K31/125 ,  B23K11/252 ,  B23K31/006

    摘要： A joining equipment in which a neural network is employed for controlling a joining process. A dynamic analog model is used for neuron elements configuring the network. The equipment includes a detector, a controller, and a neural network. The detector detects a joining state of a joining portion when work pieces are joined with each other. The controller controls the output of the joining equipment. In response to output signals from the detector, the neural network transmits signals to the controller. Such a structure allows the joining equipment to flexibly respond to complicated changes in joining states. Besides, using similarity with a thermal conduction equation enables to minimize the number of input items fed into the neural network. Furthermore, using an approximate solution to the thermal conduction equation realizes to accelerate the time for numerical calculation without loss of accuracy.

    Resistance welding machine control method
    10.
    发明授权
    Resistance welding machine control method 有权
    电阻焊机控制方法

    公开(公告)号：US06294753B1

    公开(公告)日：2001-09-25

    申请号：US09422055

    申请日：1999-10-21

    申请人： Koji Fujii ,  Yasuhiro Gotou ,  Makoto Ryudo ,  Mikiji Suzuki

    发明人： Koji Fujii ,  Yasuhiro Gotou ,  Makoto Ryudo ,  Mikiji Suzuki

    IPC分类号： B23K1124

    CPC分类号： B23K11/258 ,  B23K11/252 ,  B23K11/257

    摘要： A resistor welding machine control method for calculating a temperature distribution at a portion to be welded by using changes in welding current and voltage across two welding electrodes during welding and information on sheet combination sequence at a spot-welding position, and for controlling at least the welding current or pressure applied to the electrodes by using the calculated temperature distribution. The present invention can thus provide a resistor welding machine control method capable of controlling welding quality accurately. Spot-welding position information, wear comparison information and the like are available as other information.

    摘要翻译： 一种电阻焊接机控制方法，用于通过焊接期间焊接电流和两个焊接电极之间的电压变化来计算焊接部分的温度分布，以及点焊位置处的薄片组合顺序信息，并且至少控制 通过使用计算出的温度分布来施加到电极的焊接电流或压力。 因此，本发明可以提供一种能够精确控制焊接质量的电阻焊接机控制方法。作为其他信息可以获得焊接位置信息，磨损比较信息等。