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1.发明授权Systems, circuits and methods for filtering signals to compensate for channel effects 有权用于滤波信号以补偿信道效应的系统，电路和方法公开(公告)号：US08948331B2
公开(公告)日：2015-02-03
申请号：US13931099
申请日：2013-06-28
发明人： Halil Cirit , Stefanos Sidiropoulos
IPC分类号： H04L7/00 , H04L25/03 , H04B10/2507
CPC分类号： H04B10/2507 , H04L25/03063 , H04L25/0307 , H04L25/03076
摘要： Embodiments of circuits and methods are described for decreasing transmitter waveform dispersion penalty (TWDP) in a transmitter. A data stream is received for transmission across a channel and a main data signal is generated from the data stream. At least two cursor signals are generated where each of the at least two cursor signals are shifted at least a portion of a clock period from the main data signal. The at least two cursor signals are subtracted from the main data signal to generate an output data signal with improved TWDP. Other embodiments include generating a main data signal, a pre-cursor signal shifted on previous clock cycle relative to the main data signal, and a post-cursor signal Shifted one subsequent clock cycle relative to the main data signal. The pre and post cursor signals are subtracted from the main data signal to generate an output data signal.
摘要翻译： 描述了用于降低发射机中的发射机波形色散惩罚（TWDP）的电路和方法的实施例。 接收数据流以通过信道传输，并从数据流生成主数据信号。 产生至少两个光标信号，其中至少两个光标信号中的每一个从主数据信号中移位到时钟周期的至少一部分。 从主数据信号中减去至少两个光标信号，以产生具有改进的TWDP的输出数据信号。 其他实施例包括产生主数据信号，相对于主数据信号在先前时钟周期上移位的前置光标信号，以及相对于主数据信号移位一个后续时钟周期的后光标信号。 从主数据信号中减去前后游标信号，生成输出数据信号。
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公开(公告)号：US09094020B2
公开(公告)日：2015-07-28
申请号：US13929415
申请日：2013-06-27
CPC分类号： H03L5/00 , G01R31/2851 , G06F7/00 , G06F21/00 , H03K19/0002
摘要： An integrated circuit comprises a circuit module, a first function circuit, and a second function circuit. The first function circuit is configured to be operational in response to a first type logic signal at a first pin and the second function circuit is configured to be operational in response to a second type logic signal at the first pin. The type of logic signal at the first pin is determined by the circuit module. Based on the determined type of logic signal, the circuit module is configured to activate the appropriate function circuit and provide function related signaling for operation at a second pin. The circuit module allows the pins of the integrated circuit to be shared between the first and second function circuits, thus minimizing the number of pins required for multi-functional circuits on the integrated circuit.
摘要翻译： 集成电路包括电路模块，第一功能电路和第二功能电路。 第一功能电路被配置为响应于第一引脚处的第一类型逻辑信号而工作，并且第二功能电路被配置为响应于第一引脚处的第二类型逻辑信号而工作。 第一引脚上的逻辑信号类型由电路模块决定。 基于所确定的逻辑信号类型，电路模块被配置为激活适当的功能电路并提供功能相关的信号用于在第二引脚处操作。 电路模块允许集成电路的引脚在第一和第二功能电路之间共享，从而最小化集成电路上的多功能电路所需的引脚数。
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公开(公告)号：US20130285736A1
公开(公告)日：2013-10-31
申请号：US13929415
申请日：2013-06-27
IPC分类号： H03L5/00
CPC分类号： H03L5/00 , G01R31/2851 , G06F7/00 , G06F21/00 , H03K19/0002
摘要： An integrated circuit comprises a circuit module, a first function circuit, and a second function circuit. The first function circuit is configured to he operational in response to a first type logic signal at a first pin and the second function circuit is configured to be operational in response to a second type logic signal at the first pin. The type of logic signal at the first pin is determined by the circuit module. Based on the determined type of logic signal, the circuit module is configured to activate the appropriate function circuit and provide function related signaling for operation at a second pin. The circuit module allows the pins of the integrated circuit to be shared between the first and second function circuits, thus minimizing the number of pins required for multi-functional circuits on the integrated circuit.
摘要翻译： 集成电路包括电路模块，第一功能电路和第二功能电路。 第一功能电路被配置为响应于第一引脚处的第一类型逻辑信号而工作，并且第二功能电路被配置为响应于第一引脚处的第二类型逻辑信号而可操作。 第一引脚上的逻辑信号类型由电路模块决定。 基于所确定的逻辑信号类型，电路模块被配置为激活适当的功能电路并提供功能相关的信号用于在第二引脚处操作。 电路模块允许集成电路的引脚在第一和第二功能电路之间共享，从而最小化集成电路上的多功能电路所需的引脚数。
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