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公开(公告)号：US4879597A
公开(公告)日：1989-11-07
申请号：US148610
申请日：1988-01-26
申请人： Nicholas Barton , Robert Billing , Paul K. Burgess
发明人： Nicholas Barton , Robert Billing , Paul K. Burgess
CPC分类号： H04N13/0003 , H04N13/0055 , H04N5/272 , H04N13/004
摘要： In a method of processing a video signal to provide digital video effects, an image signal is provided with an accompanying reference signal or Z-axis signal representative of the instantaneous distance of the scanning point of the video raster from an imaginary plane to be depicted as containing said information, taken in a direction perpendicular to the image screen. This reference signal may then be utilized to produce a variety of effects. For example a circuit for superimposing sets of image information to give the impression of an overlap in three dimensional space may comprise an order sorting circuit (1) having inputs (2,3,4) for sets of signals comprising picture information (P) a key signal (K) and a Z-axis signal (Z). At outputs (5,6,7) of the circuit the sets of signals are sorted into order of priority dependent on the magnitude of the Z-axis signal (Z). The picture signals (P) are mixed by multipliers (25,26,27) and a summer (28) to provide a composite picture signal in which the mixing of the components is determined by the multiplication factors of the multipliers (25,26,27). These factors are derived from the key signals having corresponding orders of priority, the key signals of lower order of priority being correspondingly attenuated by cascaded attenuators (12,13,14) coupled between lower order outputs of the sorting circuit (1) and a weighting circuit (11) for controlling the multipliers (25,26,27).
摘要翻译： 在处理视频信号以提供数字视频效果的方法中，图像信号被提供有伴随的参考信号或Z轴信号，其表示视频光栅的扫描点与假想平面的瞬时距离，被描绘为 包含沿垂直于图像屏幕的方向拍摄的所述信息。 然后可以利用该参考信号来产生各种效果。 例如，用于叠加图像信息集合以给出三维空间中的重叠的印象的电路可以包括具有用于包括图像信息（P）a的信号集合的输入（2,3,4）的顺序分类电路（1） 键信号（K）和Z轴信号（Z）。 在电路的输出端（5,6,7），信号组根据Z轴信号（Z）的大小按照优先次序进行排序。 图像信号（P）由乘法器（25,26,27）和加法器（28）混合以提供复合图像信号，其中分量的混合由乘法器（25,26,27）和加法器 27）。 这些因素是从具有对应的优先级的关键信号导出的，优先级较低的关键信号通过耦合在分类电路（1）的低阶输出端之间的级联衰减器（12,13,14）相应衰减， 用于控制乘法器（25,26,27）的电路（11）。
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公开(公告)号：US4847691A
公开(公告)日：1989-07-11
申请号：US148609
申请日：1988-01-26
申请人： Nicholas Barton , Robert Billing
发明人： Nicholas Barton , Robert Billing
摘要： A storage and interpolation device for digital television pictures having a memory organized in `tiles` of memory elements (2). Sub-assemblies of tiles (2A, 2B, 2C, 2D) all have the same coordinate address in one coordinate direction and have outputs coupled to an interpolation filter (6) operative in that direction. Individual tiles (2A; 2B; 2C; 2D) of respective sub-assemblies (1A, 1B, 1C, 1D) all have the same coordinate address in the other coordinate direction and the outputs of the filters (6) of the sub-assemblies are connected to inputs of a further filter (9) operative in the other coordinate direction. By allocating pixel values of discrete image areas of the picture to respective sub-assemblies (1A, 1B, 1C, 1D) in the horizontal direction and to groups of tiles (2A, 2B, 2C, 2D) in the vertical direction, interpolation can be effected by addressing all tiles simultaneously to produce a corresponding output from the filter 9.
摘要翻译： 一种用于数字电视图像的存储和插值装置，其具有以存储元件（2）的“瓦片”组织的存储器。 瓦片（2A，2B，2C，2D）的子组件在一个坐标方向上都具有相同的坐标地址，并具有耦合到在该方向上操作的内插滤波器（6）的输出。 各个子组件（1A，1B，1C，1D）的各个瓷砖（2A; 2B; 2C; 2D）在另一个坐标方向上都具有相同的坐标地址，并且子组件的过滤器（6）的输出 连接到在另一个坐标方向上操作的另一个过滤器（9）的输入。 通过在垂直方向上将图像的离散图像区域的像素值分配给各个子组件（1A，1B，1C，1D）和垂直方向上的瓦片组（2A，2B，2C，2D），插值可以 通过同时处理所有瓦片以产生来自过滤器9的相应输出来实现。
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公开(公告)号：US4922345A
公开(公告)日：1990-05-01
申请号：US148611
申请日：1988-01-26
IPC分类号： H04N5/275
CPC分类号： H04N5/275
摘要： A control signal synchronized to a digital video signal to be processed and defining the position of a rectilinear line (51,52,53,54) relatively to the image frame (50) is generated by providing an initial value corresponding to the perpendicular distance of the origin (0) of the scanning point of the video raster from the line (51,52,53,54) and incrementing or decrementing this value during movement of the scanning point in accordance with the rates of change of this distance in the horizontal and vertical directions. By logically combining the signals corresponding to a plurality of lines (52,52,53,54) a further signal is obtained which is "true" when the scanning point is within a geometric figure defined by the lines. This signal can provide a "key" signal controlling the display within the figure of image information to be combined with the video signal. Signals relating to four lines (52,52,53,54) forming a quadrilateral can provide coordinate signals for interrogation of a frame store containing image information to be transposed into the area defined by the quadrilateral figure.
摘要翻译： 与要处理的数字视频信号同步的控制信号和相对于图像帧（50）定义直线（51,52,53,54）的位置是通过提供对应于垂直距离 来自线（51,52,53,54）的视频光栅的扫描点的原点（0），并且在扫描点移动期间根据该距离在水平方向上的变化率递增或递减该值 和垂直方向。 通过逻辑地组合对应于多条线（52,52,53,54）的信号，当扫描点在由线限定的几何图形内时，获得另一个“真”信号。 该信号可以提供控制要与视频信号组合的图像信息的图形内的显示的“键”信号。 与形成四边形的四条线（52,52,53,54）相关的信号可以提供用于询问包含要转置到由四边形图形定义的区域中的图像信息的帧存储器的坐标信号。
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公开(公告)号：US5220428A
公开(公告)日：1993-06-15
申请号：US669397
申请日：1991-05-03
申请人： Robert Billing , Nicholas Barton
发明人： Robert Billing , Nicholas Barton
CPC分类号： H04N5/2628
摘要： In a digital video effects system a data store (13) is provided for storing the address within a frame store of image information from the corresponding image frame that is to appear within another image frame as transposed on to a curved surface. The addresses are stored in "curved" order so that when the store (13) is addressed via inputs (24) providing the coordinates of the scanning point of the television raster, the store (13) provides, at an output (25) that address within the frame store which contains the image information to be represented at the corresponding point in the final image. Such storage of the address values in "curved" order is achieved by applying at data inputs of the store a linear sequence of the coordinate addresses of the image frame store whilst providing at write addresses (11, 12) of the store data (13) corresponding values of the coordinates that have been transformed to define the curved surface to appear in the final image.
摘要翻译： PCT No.PCT / GB89 / 01116 Sec。 371日期1991年5月3日 102（e）日期1991年5月3日PCT提交1989年9月22日PCT公布。 WO90 / 03703 PCT出版物 日本1990年4月5日。在数字视频效果系统中，提供数据存储器（13），用于将图像信息的帧存储中的地址存储在来自另一图像帧中的相应图像帧中，该对应图像帧被转置到 曲面。 地址以“弯曲”的顺序存储，使得当通过提供电视光栅的扫描点的坐标的输入（24）寻址存储（13）时，存储（13）在输出（25）处提供 在包含要在最终图像中的对应点处表示的图像信息的帧存储器内的地址。 通过在存储数据的数据输入处应用图像帧存储器的坐标地址的线性序列，同时在存储数据（13）的写入地址（11,12）处提供地址值来实现“弯曲”顺序的这种存储， 已经被变换以定义曲面的坐标的相应值出现在最终图像中。
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公开(公告)号：US5293233A
公开(公告)日：1994-03-08
申请号：US890597
申请日：1992-07-10
申请人： Robert Billing , Nicholas Barton
发明人： Robert Billing , Nicholas Barton
CPC分类号： G06T3/4007
摘要： In a digital video effects system having a store (8) wherein coordinate values are stored in curved order by addressing the store with coordinate values transformed by a function generator (1) and transformer (2) and storing linear values derived from counters (6), the resolution of incremental values from the transformer (2) is increased as necessary to avoid unwritten addresses in the store by providing, between the transformer (2) and the store (8), delay means (3) for providing coordinates of the corners of adjacent quadrilateral areas defined by integer values of the transformed coordinates, a "predisector" (4) for providing coordinates of smaller quadrilateral areas into which the first areas can be divided, and a "hole filler" (5) for generating intermediate coordinate values failing within each smaller quadrilateral. An interpolator (7) serves to provide intermediate data values derived from the linear values to match the intermediate coordinate values generated by the hole filler.
摘要翻译： PCT No.PCT / GB91 / 00033 Sec。 371日期：1992年7月10日 102（e）日期1992年7月10日PCT 1991年1月10日PCT PCT。 公开号WO91 / 10966 日期：1991年7月25日。在具有商店（8）的数字视频效果系统中，其中坐标值以弯曲顺序存储，通过利用由函数发生器（1）和变压器（2）变换的坐标值寻址存储器并存储线性 从计数器（6）导出的值，根据需要增加变压器（2）的增量值的分辨率，以通过在变压器（2）和存储器（8）之间提供延迟装置（3）来避免存储器中的未写入地址 ），用于提供由变换坐标的整数值定义的相邻四边形区域的角的坐标;提供用于提供第一区域可以被划分的较小四边形区域的坐标的“预先检测器”（4）和“填孔” 5）用于生成在每个较小四边形内失败的中间坐标值。 插值器（7）用于提供从线性值导出的中间数据值，以匹配由填孔器产生的中间坐标值。
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公开(公告)号：US4918530A
公开(公告)日：1990-04-17
申请号：US398540
申请日：1989-08-25
申请人： Nicholas Barton , Robert Billing
发明人： Nicholas Barton , Robert Billing
IPC分类号： H04N5/262
CPC分类号： H04N5/2625
摘要： A video image processing system for generating so-called "multi-freeze" digital video effects comprises a frame store (14) within which an image signal can be stored for application to a combining circuit (4) together with a background image signal (1) providing a background against which a trail of frozen images is to be displayed. The trail of images is derived by recycling images stored in the memory (14) through a further combining circuit (19) wherein the stored image is combined with incoming image signals applied to both combining means (4,19). Decay and patterning of the frozen images can be effected by circuits (24,25) for attenuating and profiling the key signals accompanying the image signals.
摘要翻译： 一种用于产生所谓的“多冻结”数字视频效果的视频图像处理系统包括一个帧存储器（14），其中可以将图像信号与背景图像信号（1）一起存储在其中以应用于组合电路（4） ）提供要显示冻结图像的踪迹的背景。 通过将存储的图像与施加到组合装置（4,19）的输入图像信号组合的另一组合电路（19）来再现存储在存储器（14）中的图像，导出图像的轨迹。 冷冻图像的衰减和图案化可以由用于衰减和分析伴随图像信号的键信号的电路（24,25）来实现。
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公开(公告)号：US06239846B1
公开(公告)日：2001-05-29
申请号：US09054522
申请日：1998-04-03
申请人： Robert Billing
发明人： Robert Billing
IPC分类号： H04N974
CPC分类号： G11B27/034 , G11B27/34 , H04N5/262
摘要： A digital video effects apparatus is arranged to generate a digital video effect by interpolating the values of parameters governing the effect, according to a given function, between time points corresponding to selected frames of a video signal and at which the parameters are fixed at selected values. The apparatus is organised in such a manner that the values of parameters are stored in exclusive timelines enabling the time points at which the parameter values are fixed to be adjusted without reference to other parameters governing the same video effect.
摘要翻译： 数字视频效果装置被配置为通过根据给定的功能在对应于视频信号的所选帧的时间点之间插入控制效果的参数的值并且将参数固定在所选择的值上来产生数字视频效果 。 该装置以这样一种方式组织，使得参数的值被存储在专用时间线上，使得在不参考控制相同视频效果的其他参数的情况下，调整参数值被固定的时间点进行调整。
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公开(公告)号：US5524091A
公开(公告)日：1996-06-04
申请号：US263439
申请日：1994-06-21
申请人： Robert Billing
发明人： Robert Billing
CPC分类号： G06F7/535 , G06F2207/5354 , G06F2207/5356 , G06F7/49973
摘要： A digital divider for forming the quotient (Q) of two numbers (A,B) includes means providing values (Q+1, Q-1) of the quotient with possible rounding errors added to or subtracted therefrom. Selector switching means is arranged to select one of the values (Q, Q+1, Q-1) under the control of a logic circuit operating according to the following rules: ##EQU1##
摘要翻译： 用于形成两个数字（A，B）的商（Q）的数字分频器包括提供商的值（Q + 1，Q-1）的装置，其中加上或从中减去可能的舍入误差。 选择器切换装置被布置为在根据以下规则操作的逻辑电路的控制下选择一个值（Q，Q + 1，Q-1）：A> = 0且A> =（Q + 1）* B使用Q + 1 A> = 0，A <（Q + 1）* B使用QA <0，A> = Q * B使用QA <0，A
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公开(公告)号：US5153726A
公开(公告)日：1992-10-06
申请号：US377833
申请日：1989-08-18
申请人： Robert Billing
发明人： Robert Billing
CPC分类号： H04N5/907 , G11B27/031 , H04N19/423 , H04N19/61 , H04N5/945 , G11B2220/61
摘要： A system enabling a digital video signal to be recorded and reproduced utilizing a solid state memory store (1) as the recording medium comprises a plurality of random access memory sub-systems (1A-1D) each incorporating a read/write buffer (2). The buffers (2) are connected in parallel to a common video data bus (3) and addressing and control inputs of the subsystems (1A-1D) are connected in parallel to a common control bus (5). One or more read/write sub-systems (6) are arranged to receive and/or output digital video signals in real time via an input (10) or output (11), such signals being transfered to and/or from the store (1) via a corresponding buffer (7; 9) coupled to the data bus (3). The capacity of the buffers (2, 7, 9) and the data bus (3) is a multiple of that of the input (10) or output (11) so that each read/write system (6) can transfer accumulated data at a slower rate than it is received or output. The transfer of data via the read/write sub-system (6) is effected by addressing memory sub-systems (1A-1D) consecutively with the same address whereby consecutive groups of data bits of a serial signal are distributed between respective memory sub-systems (1A-1D). Thus recording and replaying of a digital video signal can be effected in real time using solid state memory devices that are relatively slow to operate.
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公开(公告)号：US5067133A
公开(公告)日：1991-11-19
申请号：US377832
申请日：1989-08-18
申请人： Robert Billing
发明人： Robert Billing
CPC分类号： H04N5/907 , G11B27/031 , H04N19/423 , H04N19/61 , H04N5/945 , G11B2220/61
摘要： Deterioration of the image as a result of failure of individual memory cells is avoided by storing, together with the data relating to each line of the image field, a code value computed as a function of the value of each data bit in the line and the position of each bit in the line. A picture signal stored in this way may be reproduced by transmitting each line signal to a function generator (15), adder (16) and accumulator (17) to re-compute a code value by the same function utilized during the storage of the signal, and applying the stored code value to a latch (21). The outputs of the accumulator (17) and latch (21) are applied to a subtracting circuit (25), and when the latter produces any output signal other than zero, the value of such signal will indicate both the position of any single faulty bit and the direction in which the stored value is in error.
摘要翻译： PCT No.PCT / GB87 / 00922 Sec。 371日期1989年8月18日 102（e）日期1989年8月18日PCT提交1987年12月30日PCT公布。 出版物WO88 / 05245 日期：1988年7月14日。通过与图像场的每一行相关的数据一起存储作为每个存储单元的值的函数计算的代码值来避免由于各个存储器单元的故障而导致的图像的改进 行中的数据位和行中每一位的位置。 以这种方式存储的图像信号可以通过将每个线路信号发送到函数发生器（15），加法器（16）和累加器（17）来再现，以通过在信号存储期间使用的相同功能重新计算码值 ，并将所存储的代码值应用于锁存器（21）。 累加器（17）和锁存器（21）的输出被施加到减法电路（25），并且当其产生除零之外的任何输出信号时，这种信号的值将指示任何单个故障位的位置 以及存储值错误的方向。
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