Port rate smoothing in an avionics network
    1.
    发明授权
    Port rate smoothing in an avionics network 有权
    航空电子网络中的端口速率平滑

    公开(公告)号:US07929431B2

    公开(公告)日:2011-04-19

    申请号:US11687927

    申请日:2007-03-19

    IPC分类号: H04J3/14

    摘要: A communication network is provided. The network includes a least one switch and a plurality of ports. Each port is in communication with the at least one switch. At least one of the ports is configured to introduce a time delay after each transmission of a frame based at least in part on a maximum transmission rate of the at least one port and its allocated transmission rate.

    摘要翻译: 提供通信网络。 网络包括至少一个交换机和多个端口。 每个端口与至少一个交换机通信。 至少一个端口被配置为至少部分地基于至少一个端口的最大传输速率及其分配的传输速率来在帧的每次传输之后引入时间延迟。

    PORT RATE SMOOTHING IN AN AVIONICS NETWORK
    2.
    发明申请
    PORT RATE SMOOTHING IN AN AVIONICS NETWORK 有权
    港口速度在航空电子网络中的平滑

    公开(公告)号:US20080232253A1

    公开(公告)日:2008-09-25

    申请号:US11687927

    申请日:2007-03-19

    IPC分类号: H04L12/26

    摘要: A communication network is provided. The network includes a least one switch and a plurality of ports. Each port is in communication with the at least one switch. At least one of the ports is configured to introduce a time delay after each transmission of a frame based at least in part on a maximum transmission rate of the at least one port and its allocated transmission rate.

    摘要翻译: 提供通信网络。 网络包括至少一个交换机和多个端口。 每个端口与至少一个交换机通信。 至少一个端口被配置为至少部分地基于至少一个端口的最大传输速率及其分配的传输速率来在帧的每次传输之后引入时间延迟。

    Bounded minimal latency for network resources without synchronization
    3.
    发明授权
    Bounded minimal latency for network resources without synchronization 有权
    限制网络资源的最小延迟,无需同步

    公开(公告)号:US07933202B2

    公开(公告)日:2011-04-26

    申请号:US12364619

    申请日:2009-02-03

    IPC分类号: H04L12/26 G06F15/173

    摘要: Systems and methods for bounded minimal latency for network resources without synchronization are provided. In one embodiment, a method for managing data traffic between nodes in an asynchronous network comprises: receiving a data request message at a first port of network switch; storing information about the data request message in a memory at the network switch; forwarding the data request message to a producer node; receiving a data message at a second port of the network switch; determining whether the data message is responsive to the data request message; when the data message is responsive, forwarding the data message from the network switch; and when the data message is not responsive, blocking the data message from being forwarded from the network.

    摘要翻译: 提供了没有同步的网络资源的有界最小延迟的系统和方法。 在一个实施例中,一种用于管理异步网络中的节点之间的数据业务的方法包括:在网络交换机的第一端口处接收数据请求消息; 将关于数据请求消息的信息存储在网络交换机的存储器中; 将数据请求消息转发给生产者节点; 在所述网络交换机的第二端口处接收数据消息; 确定所述数据消息是否响应于所述数据请求消息; 当数据消息响应时,从网络交换机转发数据消息; 并且当数据消息不响应时,阻止数据消息从网络转发。

    BOUNDED MINIMAL LATENCY FOR NETWORK RESOURCES WITHOUT SYNCHRONIZATION
    4.
    发明申请
    BOUNDED MINIMAL LATENCY FOR NETWORK RESOURCES WITHOUT SYNCHRONIZATION 有权
    对于没有同步的网络资源的限制最小化

    公开(公告)号:US20100195491A1

    公开(公告)日:2010-08-05

    申请号:US12364619

    申请日:2009-02-03

    IPC分类号: H04L12/56

    摘要: Systems and methods for bounded minimal latency for network resources without synchronization are provided. In one embodiment, a method for managing data traffic between nodes in an asynchronous network comprises: receiving a data request message at a first port of network switch; storing information about the data request message in a memory at the network switch; forwarding the data request message to a producer node; receiving a data message at a second port of the network switch; determining whether the data message is responsive to the data request message; when the data message is responsive, forwarding the data message from the network switch; and when the data message is not responsive, blocking the data message from being forwarded from the network.

    摘要翻译: 提供了没有同步的网络资源的有界最小延迟的系统和方法。 在一个实施例中,一种用于管理异步网络中的节点之间的数据业务的方法包括:在网络交换机的第一端口处接收数据请求消息; 将关于数据请求消息的信息存储在网络交换机的存储器中; 将数据请求消息转发给生产者节点; 在所述网络交换机的第二端口处接收数据消息; 确定所述数据消息是否响应于所述数据请求消息; 当数据消息响应时,从网络交换机转发数据消息; 并且当数据消息不响应时,阻止数据消息从网络转发。

    Method for sensor initialization in a structural health management system
    5.
    发明授权
    Method for sensor initialization in a structural health management system 失效
    结构健康管理系统中传感器初始化的方法

    公开(公告)号:US07512500B2

    公开(公告)日:2009-03-31

    申请号:US11019691

    申请日:2004-12-21

    IPC分类号: G06F3/00

    摘要: A method for initializing a chain of non-initialized data collectors is disclosed. The chain of non-initialized data collectors are coupled to a controller. In a first step communication between the controller and each data collector in the chain of non-initialized collectors is disabled, except for an active non-initialized data collector, The active non-initialized collector is coupled to the controller and any remaining non-initialized data collectors. Next, the active non-initialized data collector is initialized by assigning an identification number to the active non-initialized data collectors. The active non-initialized collector becomes an initialized data collector. Then, communication is restored between the initialized data collector and a next active non-initialized data collector in the chain of non-initialized data collectors. The method repeats until all non-initialized data collectors are initialized.

    摘要翻译: 公开了一种初始化未初始化的数据采集器链的方法。 未初始化的数据采集器链被耦合到控制器。 在第一步中,控制器与未初始化的收集器链中的每个数据收集器之间的通信被禁用,除了活动的未初始化的数据收集器之外,活动的未初始化的收集器耦合到控制器,并且任何剩余的未初始化 数据收集器。 接下来,通过向活动的未初始化的数据收集器分配识别号码来初始化活动的未初始化数据收集器。 活动的非初始化收集器成为初始化的数据收集器。 然后,在初始化的数据收集器和未初始化数据收集器链中的下一个活动的非初始化数据收集器之间恢复通信。 该方法重复,直到所有未初始化的数据收集器被初始化。

    Quick Connect Rifle Receiver Adapter System
    6.
    发明申请

    公开(公告)号:US20170160037A1

    公开(公告)日:2017-06-08

    申请号:US14959793

    申请日:2015-12-04

    IPC分类号: F41A21/48 F41A3/66

    CPC分类号: F41A21/482

    摘要: The present invention is a quick connect receiver adapter assembly for an automatic or semi-automatic rifle, specifically the AR-15 assault rifle. The adapter system is used to quickly exchange barrels on an AR-15 rifle platform, and allows the user to convert the AR-15 from a single caliber weapon to a multi-caliber weapon. The system has a receiver attached portion comprising a three piece locking ring assembly, and separate barrel adapter assembly which can be attached to any caliber barrel suitable for use with the AR-15 assault rifle.

    Multiple-port memory systems and methods
    7.
    发明授权
    Multiple-port memory systems and methods 有权
    多端口内存系统和方法

    公开(公告)号:US08316192B2

    公开(公告)日:2012-11-20

    申请号:US12575709

    申请日:2009-10-08

    IPC分类号: G06F12/00

    CPC分类号: G11C8/16 G06F13/1684

    摘要: Systems and methods for improved multiple-port memory are provided. In one embodiment, a processing system comprises: at least one processing core; a peripheral bus; and a memory for storing digital data, the memory divided into a first and a second partition of memory segments. The memory includes a first port coupled to the peripheral bus providing read access and write access only to the first partition, wherein the first partition stores peripheral data associated with one or more peripheral components coupled to the peripheral bus; a second port coupled to the at least one processor providing read-only access to only the second partition, wherein the second partition stores executable code for the at least one processing core; and a third port coupled to the at least one processor providing read access and write access to the entire first partition and the second partition.

    摘要翻译: 提供了改进多端口存储器的系统和方法。 在一个实施例中,处理系统包括:至少一个处理核心; 外围总线 以及用于存储数字数据的存储器,所述存储器被分成存储器段的第一和第二分区。 存储器包括耦合到外围总线的第一端口,仅提供对第一分区的读访问和写访问,其中第一分区存储与耦合到外围总线的一个或多个外围组件相关联的外围数据; 耦合到所述至少一个处理器的第二端口,其提供仅对所述第二分区的只读访问,其中所述第二分区存储用于所述至少一个处理核心的可执行代码; 以及耦合到所述至少一个处理器的第三端口,其提供对所述整个第一分区和所述第二分区的读访问和写访问。

    REDUCING POWER CONSUMPTION FOR DYNAMIC MEMORIES USING DISTRIBUTED REFRESH CONTROL
    8.
    发明申请
    REDUCING POWER CONSUMPTION FOR DYNAMIC MEMORIES USING DISTRIBUTED REFRESH CONTROL 有权
    使用分布式刷新控制降低动态存储器的功耗

    公开(公告)号:US20110107022A1

    公开(公告)日:2011-05-05

    申请号:US12612722

    申请日:2009-11-05

    IPC分类号: G06F12/00 G06F1/04

    CPC分类号: G11C11/40611 G11C11/406

    摘要: A method for refreshing memory is provided. The method comprises determining when a first memory of a plurality of memories is not being accessed and sending a refresh opportunity command from a master refresh controller to one of a plurality of local refresh controllers when the first memory is not being accessed, wherein the one of a plurality of local refresh controllers controls only the first memory. The method further comprises determining when the first memory needs refreshing and refreshing the first memory.

    摘要翻译: 提供了一种刷新存储器的方法。 所述方法包括:当所述第一存储器未被访问时,确定多个存储器的第一存储器什么时候不被访问并且将主刷新控制器的刷新机会命令发送到多个本地刷新控制器之一,其中, 多个本地刷新控制器仅控制第一存储器。 该方法还包括确定第一存储器何时需要刷新和刷新第一存储器。

    INTEGRATED DISSIMILAR HIGH INTEGRITY PROCESSING
    9.
    发明申请
    INTEGRATED DISSIMILAR HIGH INTEGRITY PROCESSING 有权
    集成DISSIMILAR高度完整性处理

    公开(公告)号:US20120030519A1

    公开(公告)日:2012-02-02

    申请号:US12847687

    申请日:2010-07-30

    IPC分类号: G06F11/30 G06F9/40

    CPC分类号: G06F11/1645 G06F11/1637

    摘要: A self-checking network is provided, comprising a first command processor configured to execute a performance function and a second command processor configured to execute the performance function, coupled to the first command processor. The self-checking network also comprises a first monitor processor configured to execute a monitor function that is coupled to the first command processor and a second monitor processor configured to execute the monitor function that is coupled to the second command processor. The first and second command processors compare outputs, the first and second monitor processors compare outputs, and the first monitor processor determines whether an output of the first command processor exceeds a first selected limit.

    摘要翻译: 提供了一种自检网络,包括被配置为执行演奏功能的第一命令处理器和被配置为执行与第一命令处理器耦合的演奏功能的第二命令处理器。 自检网络还包括被配置为执行耦合到第一命令处理器的监视功能的第一监视器处理器和被配置为执行耦合到第二命令处理器的监视功能的第二监视器处理器。 第一和第二命令处理器比较输出,第一和第二监视器处理器比较输出,并且第一监视器处理器确定第一命令处理器的输出是否超过第一选择的限制。

    HIGH INTEGRITY DATA BUS FAULT DETECTION USING MULTIPLE SIGNAL COMPONENTS
    10.
    发明申请
    HIGH INTEGRITY DATA BUS FAULT DETECTION USING MULTIPLE SIGNAL COMPONENTS 有权
    使用多个信号组件的高完整性数据总线故障检测

    公开(公告)号:US20110214043A1

    公开(公告)日:2011-09-01

    申请号:US12713712

    申请日:2010-02-26

    IPC分类号: G06F11/07

    摘要: Methods and apparatus are provided for verifying the integrity of a signal transmitted across a multiple rail data bus. The method and apparatus provide for independently processing a signal by a first processor and a second processor, the first and second processors being connected in parallel thereby generating a first processed signal and a second processed signal. Each of the processed signals is split into a first component sequence and a second component sequence, the first component sequences being different from the second component sequences. It is then determined that the first component sequences are not identical and that the second component sequences are not identical. If either of the first component sequences is not identical, or if either of the second component sequences is not identical, then an error signal is transmitted to a receiving device via a first or second rail of the bus.

    摘要翻译: 提供了用于验证跨多轨数据总线传输的信号的完整性的方法和装置。 该方法和装置提供由第一处理器和第二处理器独立地处理信号,第一和第二处理器并联连接,从而产生第一处理信号和第二处理信号。 每个经处理的信号被分成第一组分序列和第二组分序列,第一组分序列不同于第二组分序列。 然后确定第一组分序列不相同,并且第二组分序列不相同。 如果第一分量序列中的任一个不相同,或者如果第二分量序列中的任一个不相同,则通过总线的第一或第二轨道向接收设备发送错误信号。