公开(公告)号：US20140027717A1

公开(公告)日：2014-01-30

申请号：US13559914

申请日：2012-07-27

申请人： Nick A.J.M. van Aerle ,  Erik Van Veenendaal ,  Pieter Van Lieshout ,  Christoph Wilhelm Sele ,  Joris P.V. Maas

发明人： Nick A.J.M. van Aerle ,  Erik Van Veenendaal ,  Pieter Van Lieshout ,  Christoph Wilhelm Sele ,  Joris P.V. Maas

IPC分类号： H01L51/52 ,  H01L21/336 ,  H01L27/15 ,  H01L29/786 ,  H01L33/16

CPC分类号： H01L27/3274 ,  G02F1/167 ,  H01L27/3265 ,  H01L27/3276 ,  H01L51/0558

摘要： Pixel control structure for use in a backplane for an electronic display, including a transistor that has a gate, a source, a drain, and an organic semiconductor element. The pixel control structure is formed by a first patterned conductive layer portion, a second patterned conductive layer portion, a dielectric layer portion, and an organic patterned semiconductive layer portion. The dielectric layer portion comprises an overlap region defined by overlap of the second conductive layer portion over the first conductive layer portion. The overlap region defines an overlap boundary, defined by an edge portion of the first patterned conductive layer portion and an edge portion of the second patterned conductive layer portion. The patterned semiconductive layer portion extends over the overlap region and away from the overlap region so as to extend from both first and second edge portions.

摘要翻译： 用于电子显示器的背板中的像素控制结构，包括具有栅极，源极，漏极和有机半导体元件的晶体管。 像素控制结构由第一图案化导电层部分，第二图案化导电层部分，电介质层部分和有机图案化半导体层部分形成。 电介质层部分包括通过第一导电层部分上的第二导电层部分的重叠限定的重叠区域。 重叠区域限定由第一图案化导电层部分的边缘部分和第二图案化导电层部分的边缘部分限定的重叠边界。 图案化半导体层部分在重叠区域上延伸并远离重叠区域，从而从第一和第二边缘部分延伸。

公开(公告)号：US20140014942A1

公开(公告)日：2014-01-16

申请号：US13548133

申请日：2012-07-12

申请人： Joris P.V. Maas

发明人： Kevin Michael O'Neill ,  Joris P.V. Maas

IPC分类号： H01L29/786 ,  H01L29/66

CPC分类号： H01L29/78693 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618

摘要： A bottom gate bottom contact thin-film transistor including a gate electrode, a source electrode, a drain electrode, a dielectric layer and a semiconductor layer of a semiconducting oxide is disclosed. The dielectric layer is arranged between the gate electrode and the semiconductor layer structure, and the source electrode and the drain electrode are covered with said semiconductor layer structure. The source electrode and the drain electrode include at least a first electrode portion of an oxygen reducing material, and a second electrode portion of an additional material different from said oxygen reducing material wherein the second electrode portion of the drain at a side facing the source exposes to said semiconductor layer structure at least a surface portion of a main surface of its first electrode portion facing away from the dielectric layer.

摘要翻译： 公开了一种包括半导体氧化物的栅电极，源电极，漏电极，电介质层和半导体层的底栅底接触薄膜晶体管。 电介质层配置在栅电极和半导体层结构之间，源电极和漏电极被半导体层结构覆盖。 源电极和漏电极至少包括氧还原材料的第一电极部分和与所述氧还原材料不同的附加材料的第二电极部分，其中在面向源极的一侧的漏极的第二电极部分暴露 至少在其第一电极部分的主表面的远离电介质层的主表面的表面部分的所述半导体层结构。