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    Amplifier shared between two columns in CMOS sensor
    1.
    发明授权
    Amplifier shared between two columns in CMOS sensor 有权
    放大器在CMOS传感器中的两列之间共享

    公开(公告)号：US07471324B2

    公开(公告)日：2008-12-30

    申请号：US10229176

    申请日：2002-08-28

    Applicant: Nick Tu ,  Alexander Krymski

    Inventor： Nick Tu ,  Alexander Krymski

    IPC: H04N5/335

    CPC classification number: H04N5/378

    Abstract: The present invention provides an improved shared amplifier circuitry and method of operation which minimizes offset and column to column fixed pattern noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output and saves chip area. This is accomplished by simultaneously sampling and storing charge accumulated signals from a first and a second desired pixel from a respective first and second column. The circuit amplifies the first charge signal and then samples and amplifies the reset signal of the first desired pixel and subsequently outputs the amplified first charge signal and the reset signal. Then the circuit amplifies the second charge signal and the reset signal of the first desired pixel and subsequently outputs the amplified second charge signal and the reset signal.

    Abstract translation: 本发明提供了一种改进的共享放大器电路和操作方法，其在读出操作期间使偏移和列至列固定模式噪声最小化。 该电路提高了像素阵列的像素与像素输出的一致性，并增加了像素输出的动态范围，节省了芯片面积。 这是通过从相应的第一和第二列同时采样和存储来自第一和第二所需像素的电荷累积信号来实现的。 电路放大第一充电信号，然后对第一所需像素的复位信号进行采样和放大，随后输出放大的第一充电信号和复位信号。 然后，电路放大第一所需像素的第二充电信号和复位信号，随后输出放大的第二充电信号和复位信号。

    Image sensors, methods, and high dynamic range pixels with variable capacitance
    3.
    发明授权
    Image sensors, methods, and high dynamic range pixels with variable capacitance 有权

    公开(公告)号：US11011560B2

    公开(公告)日：2021-05-18

    申请号：US15854527

    申请日：2017-12-26

    Applicant: Alexander Krymski

    Inventor： Alexander Krymski

    IPC: H01L27/146

    Abstract: A pixel includes a photodiode and a readout node for receiving charge transferred from the photodiode. The readout node is configured to have a variable capacitance that is non-linear with respect to a voltage at the readout node. The readout node is resettable. The readout node may be configured to have a lower capacitance when reset to a reset voltage than when getting filled with charge from the photodiode. The readout node may be configured such that the capacitance of the readout node continuously increases as additional charge is received by the readout node after the readout node is reset. The readout node may be configured such that the capacitance of the readout node jumps from a first capacitance to a second capacitance after the readout node has been filled with a certain amount of charge. An image sensor includes a pixel array with a plurality of the pixels.

    IMAGE SENSORS, METHODS, AND PIXELS WITH FLOATING DIFFUSION AND GATE FOR CHARGE STORAGE
    4.
    发明申请
    IMAGE SENSORS, METHODS, AND PIXELS WITH FLOATING DIFFUSION AND GATE FOR CHARGE STORAGE 审中-公开

    公开(公告)号：US20200350350A1

    公开(公告)日：2020-11-05

    申请号：US16399806

    申请日：2019-04-30

    Applicant: Alexander Krymski

    Inventor： Alexander Krymski

    IPC: H01L27/146 ,  H04N5/378 ,  H04N5/3745

    Abstract: A pixel includes a photodiode, a first transfer gate, a second transfer gate, and a floating diffusion. The pixel may include a storage gate, and the first transfer gate may be controllable to transfer charge from the photodiode to an area under the storage gate. The storage gate is controllable to store the charge in the area under the storage gate and to transfer the charge from the area under the storage gate. The first transfer gate may be controllable among a first biasing condition in which charge is transferable to an area under the first transfer gate, a second biasing condition in which the charge is storable in the area under the first transfer gate, and a third biasing condition in which the charge is transferable out of the area under the first transfer gate. The second transfer gate is controllable to transfer charge to the floating diffusion.

    Image sensors and methods with multiple phase-locked loops and serializers
    5.
    发明授权
    Image sensors and methods with multiple phase-locked loops and serializers 有权

    公开(公告)号：US10057523B1

    公开(公告)日：2018-08-21

    申请号：US15431567

    申请日：2017-02-13

    Applicant: Alexander Krymski

    Inventor： Alexander Krymski

    IPC: H04N5/376 ,  H04N5/378 ,  H04N5/907

    Abstract: An image sensor includes a pixel array, a plurality of memory blocks, a plurality of phase-locked loops, and a plurality of serializers. The pixel array includes a plurality of pixels. The plurality of memory blocks store digital pixel data converted from analog pixel signals output from the pixel array, and are located to a particular side of the pixel array. The plurality of phase-locked loops are located to the particular side of the pixel array. The plurality of serializers are located to the particular side of the pixel array. Each serializer of the plurality of serializers is connected to receive parallel data input from one or more corresponding memory blocks of the plurality of memory blocks and is configured to convert the parallel data input to serial data output using a corresponding plurality of clock signals from a corresponding phase-locked loop of the plurality of phase-locked loops.

    Image sensors and methods with pipelined readout
    6.
    发明授权
    Image sensors and methods with pipelined readout 有权
    图像传感器和流水线读出方法

    公开(公告)号：US09019411B2

    公开(公告)日：2015-04-28

    申请号：US13648067

    申请日：2012-10-09

    Applicant: Alexander Krymski

    Inventor： Alexander Krymski

    IPC: H04N3/14 ,  H04N5/335 ,  H04N5/217 ,  H04N5/374 ,  H04N5/378

    CPC classification number: H04N5/3742 ,  H04N5/378

    Abstract: A pipelined readout method in an image sensor includes receiving one or more signals from a pixel of a row of a pixel array into a column storage at least partially during a time that a previously sampled amplified output of the column storage that is based on signals provided by a previous pixel of a previously read out row of the pixel array is converted from analog to digital by an analog-to-digital conversion circuit. The method further includes performing, by the analog-to-digital conversion circuit, analog-to-digital conversion of a sampled amplified output of the column storage that is based on the one or more signals from the pixel at least partially during a time that the column storage receives at least one signal from a another pixel of a subsequently read out row of the pixel array.

    Abstract translation: 图像传感器中的流水线读出方法包括：在基于所提供的信号的列存储器的先前采样的放大输出的时间期间至少部分地将一个或多个信号从像素阵列的像素的像素接收到列存储器中 由像素阵列的先前读出的行的先前像素通过模数转换电路从模拟转换成数字。 该方法还包括通过模数转换电路，在至少部分地在该时间期间，基于来自该像素的一个或多个信号，对列存储器的采样放大输出进行模数转换 列存储从像素阵列的随后读出的行的另一个像素接收至少一个信号。

    Image sensors and methods with high speed global shutter pixels
    7.
    发明授权
    Image sensors and methods with high speed global shutter pixels 有权
    具有高速全局快门像素的图像传感器和方法

    公开(公告)号：US08785831B2

    公开(公告)日：2014-07-22

    申请号：US13343662

    申请日：2012-01-04

    Applicant: Alexander Krymski

    Inventor： Alexander Krymski

    IPC: H01L27/00

    CPC classification number: H04N5/378 ,  H01L27/14607 ,  H01L27/1461 ,  H04N5/3742 ,  H04N5/3745 ,  H04N5/37452

    Abstract: An image sensor includes a plurality of pixels and a row driver. Each pixel includes a photodiode, a first transfer gate, a second transfer gate, a first storage node, and a second storage node. The row driver is configured to provide signals to the first transfer gate and the second transfer gate of each pixel such that charge is transferred from the photodiode to the first storage node through the first transfer gate while a signal representing charge stored at the second storage node is output from the pixel to a column readout line. The row driver is also configured to provide signals to the first transfer gate and the second transfer gate such that charge is transferred from the photodiode to the second storage node through the second transfer gate while a signal representing charge stored at the first storage node is output from the pixel.

    Abstract translation: 图像传感器包括多个像素和行驱动器。 每个像素包括光电二极管，第一传输门，第二传输门，第一存储节点和第二存储节点。 行驱动器被配置为向每个像素的第一传输门和第二传输门提供信号，使得电荷通过第一传输门从光电二极管传送到第一存储节点，同时表示存储在第二存储节点处的电荷的信号 从像素输出到列读出线。 行驱动器还被配置为向第一传输门和第二传输门提供信号，使得电荷通过第二传输门从光电二极管传送到第二存储节点，同时输出表示存储在第一存储节点处的电荷的信号 从像素。

    High dynamic range imager with a rolling shutter
    8.
    发明授权
    High dynamic range imager with a rolling shutter 有权
    高动态范围的成像器与卷帘

    公开(公告)号：US07986363B2

    公开(公告)日：2011-07-26

    申请号：US12155823

    申请日：2008-06-10

    Applicant: Alexander Krymski

    Inventor： Alexander Krymski

    IPC: H04N5/335

    CPC classification number: H04N5/235 ,  H04N5/2355 ,  H04N5/335

    Abstract: A high dynamic range imager operates pixels utilizing at least a short integration period and a long integration period. The pixel reading circuits of the imager are adapted to process pixel signals corresponding to the integration periods in parallel. The pixel signals are converted into digital values in parallel. The digital values are each linear functions of the incident light and therefore suitable for use with conventional color processing algorithms. A pipelined rolling shutter operation may be employed where the short integration period of one row of pixels is performed simultaneously with the long integration period of another row of pixels.

    Abstract translation: 高动态范围成像器利用至少短的积分周期和长积分周期来操作像素。 成像器的像素读取电路适于并行处理对应于积分周期的像素信号。 像素信号被并行转换为数字值。 数字值是入射光的每个线性函数，因此适用于常规颜色处理算法。 可以采用流水线滚动快门操作，其中一行像素的短积分周期与另一行像素的长积分周期同时执行。

    Pinned photodiode photodetector with common buffer transistor and binning capability
    9.
    再颁专利
    Pinned photodiode photodetector with common buffer transistor and binning capability 有权
    带有公共缓冲晶体管的引脚光电二极管光电检测器和合并能力

    公开(公告)号：USRE41340E1

    公开(公告)日：2010-05-18

    申请号：US11524495

    申请日：2006-09-21

    Applicant: Vladimir Berezin ,  Alexander Krymski ,  Eric R. Fossum

    Inventor： Vladimir Berezin ,  Alexander Krymski ,  Eric R. Fossum

    IPC: H01L31/101 ,  H01L31/062

    CPC classification number: G01S7/487 ,  H01L27/14601 ,  H01L27/14609 ,  H01L27/14643

    Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight. A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that share buffer transistors. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of a shared buffer transistor.

    Abstract translation: 锁定光电二极管光电检测器的锁定器包括顺序启用的多个输出端口。 每当启用输出端口时，都被认为是不同的时间段。 发送指定的模式，并调查输出框以查找该模式。 接收到花样的时间表示飞行时间。 CMOS有源像素图像传感器包括共享缓冲晶体管的多个钉扎光电二极管光电检测器。 在一种配置中，来自两个或更多个被钉扎的光电二极管的电荷可以合并在一起并施加到共享缓冲晶体管的栅极。

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