Method for servicing a peripheral interrupt request in a microcontroller
    1.
    发明授权
    Method for servicing a peripheral interrupt request in a microcontroller 失效
    用于在微控制器中维护外设中断请求的方法

    公开(公告)号:US5287523A

    公开(公告)日:1994-02-15

    申请号:US597464

    申请日:1990-10-09

    IPC分类号: G06F9/38 G06F13/24 G06F9/20

    CPC分类号: G06F9/3861 G06F13/24

    摘要: A method for servicing peripheral interrupt requests in a data processing system is provided. A state vector register stores a current state of a state machine which controls the interrupt-generating peripheral. In addition, the state vector register simultaneously stores an interrupt source identifier, which indicates the source of the highest priority interrupt request currently pending for the interrupt-generating peripheral. When the processor receives an interrupt request, the value stored in the state vector register of the interrupt-generating peripheral is read into an index register in the processor. The processor then uses the value as an index into a jump table, stored in memory, which contains the interrupt service routines. The use of the state vector register in conjunction with existing internal signals enables the processor to rapidly retrieve the appropriate interrupt service routine from memory, while minimizing the system overhead associated with servicing the interrupt request.

    摘要翻译: 提供了一种用于在数据处理系统中维护外围中断请求的方法。 状态向量寄存器存储控制中断产生外设的状态机的当前状态。 另外,状态向量寄存器同时存储一个中断源标识符,它指示中断产生外设当前待处理的最高优先级中断请求的源。 当处理器接收到中断请求时,存储在中断产生外设的状态向量寄存器中的值被读入处理器中的索引寄存器。 然后,处理器将该值用作索引到存储在存储器中的跳转表,其中包含中断服务程序。 结合现有内部信号使用状态向量寄存器使得处理器可以从存储器快速检索适当的中断服务程序,同时最小化与维护中断请求相关的系统开销。

    Method and apparatus for generating a pin interrupt request in a digital
data processor using a dual function data direction register
    2.
    发明授权
    Method and apparatus for generating a pin interrupt request in a digital data processor using a dual function data direction register 失效
    用于使用双功能数据方向寄存器在数字数据处理器中产生引脚中断请求的方法和装置

    公开(公告)号:US5421027A

    公开(公告)日:1995-05-30

    申请号:US248562

    申请日:1994-05-24

    IPC分类号: G06F11/14 G06F13/24 G06F7/02

    CPC分类号: G06F13/24 Y02B60/1228

    摘要: A pin generated interrupt system in a digital data processor is capable of generating interrupt requests in order to awaken the digital data processor from a reduced state of activity and power consumption called stop mode. The user can permanently disable the pin generated interrupt system using a mask option chosen during the manufacturing process. A register bit that determines whether the pin is an input or an output is also used to enable compare circuitry that determines whether an external device is requesting an interrupt. When a plurality of pins are used, it is only necessary for an interrupt to be requested on one of the pins in order for an interrupt request signal to be generated.

    摘要翻译: 数字数据处理器中的一个引脚产生的中断系统能够产生中断请求,以便唤醒数字数据处理器从减少的活动状态和称为停止模式的功耗。 用户可以使用在制造过程中选择的掩模选项永久禁用引脚产生的中断系统。 确定引脚是输入还是输出的寄存器位也用于使能判定外部器件是否请求中断的比较电路。 当使用多个引脚时,仅需要在其中一个引脚上请求中断以便产生中断请求信号。