公开(公告)号：US07859268B2

公开(公告)日：2010-12-28

申请号：US11512351

申请日：2006-08-30

申请人： Noboru Okuzono ,  Takashi Morigami ,  Tsukasa Yasuda

发明人： Noboru Okuzono ,  Takashi Morigami ,  Tsukasa Yasuda

IPC分类号： G01R31/00 ,  G09G3/00

CPC分类号： G09G3/006 ,  G09G3/2007 ,  Y10S345/904

摘要： A test signal is supplied to a test switch provided between a D/A converter for selecting and outputting a gray scale voltage of the driving circuit and an amplifier for amplifying and supplying an output voltage at the D/A converter to set a test mode, and an output voltage of the D/A converter is directly measured by a measuring device through the test switch to measure an ON resistance of a gray scale voltage selection circuit of the D/A converter.

摘要翻译： 将测试信号提供给设置在用于选择和输出驱动电路的灰度电压的D / A转换器之间的测试开关和放大器，用于在D / A转换器处放大并提供输出电压以设置测试模式， 并且D / A转换器的输出电压由测量装置通过测试开关直接测量，以测量D / A转换器的灰度级电压选择电路的导通电阻。

公开(公告)号：US20070067693A1

公开(公告)日：2007-03-22

申请号：US11512351

申请日：2006-08-30

申请人： Noboru Okuzono ,  Takashi Morigami ,  Tsukasa Yasuda

发明人： Noboru Okuzono ,  Takashi Morigami ,  Tsukasa Yasuda

IPC分类号： G01R31/28 ,  G06F11/00

CPC分类号： G09G3/006 ,  G09G3/2007 ,  Y10S345/904

摘要： A test signal is supplied to a test switch provided between a D/A converter for selecting and outputting a gray scale voltage of the driving circuit and an amplifier for amplifying and supplying an output voltage at the D/A converter to set a test mode, and an output voltage of the D/A converter is directly measured by a measuring device through the test switch to measure an ON resistance of a gray scale voltage selection circuit of the D/A converter.

摘要翻译： 将测试信号提供给设置在用于选择和输出驱动电路的灰度电压的D / A转换器之间的测试开关和放大器，用于在D / A转换器处放大并提供输出电压以设置测试模式， 并且D / A转换器的输出电压由测量装置通过测试开关直接测量，以测量D / A转换器的灰度级电压选择电路的导通电阻。

公开(公告)号：US4999567A

公开(公告)日：1991-03-12

申请号：US453303

申请日：1989-12-20

申请人： Takashi Morigami

发明人： Takashi Morigami

IPC分类号： G05F3/24 ,  G05F1/56 ,  G05F3/18 ,  G05F3/26

CPC分类号： G05F3/262 ,  G05F1/561

摘要： First and second MOS transistors are connected through a first resistance to each other in series between first and second potentials. Third and fourth MOS transistors are connected in series between the first and second potentials. Gates of the first and third MOS transistors are commonly connected to each other, and connected to a drain of the third MOS transistor. A diode, a Zener diode, and a second resistance are connected in series between the first and second potentials, such that cathodes of the diode and the Zener diode are connected to each other. A constant voltage generated at a connecting point between the second resistance and the serial connection of the diode and the Zener diode is applied to a gate of the fourth MOS transistor. A constant current circuit thus obtained operates with a low voltage and is adapted to be connected even to a comparator having a large dependency on the threshold voltages.

摘要翻译： 第一和第二MOS晶体管通过第一和第二电势之间的第一电阻彼此串联连接。 第三和第四MOS晶体管串联连接在第一和第二电位之间。 第一和第三MOS晶体管的栅极共同连接，并连接到第三MOS晶体管的漏极。 二极管，齐纳二极管和第二电阻串联在第一和第二电位之间，使得二极管和齐纳二极管的阴极相互连接。 在第二电阻和二极管和齐纳二极管的串联之间的连接点处产生的恒定电压被施加到第四MOS晶体管的栅极。 这样获得的恒流电路以低电压工作，并且适于甚至连接到对阈值电压具有很大依赖性的比较器。

公开(公告)号：US20080100603A1

公开(公告)日：2008-05-01

申请号：US11976160

申请日：2007-10-22

申请人： Satoru Matsuda ,  Takashi Morigami

发明人： Satoru Matsuda ,  Takashi Morigami

IPC分类号： G09G5/00

CPC分类号： G09G3/3688 ,  G09G3/3696 ,  G09G2310/0248 ,  G09G2310/027 ,  G09G2320/0252 ,  G09G2330/028

摘要： An output circuit of a data driver in a liquid crystal display apparatus conducts a dot inversion driving method. The output circuit includes amplifiers that output the data signals on data lines, switches that separate the data lines from the amplifiers and short/precharge circuit that shorts the lines between the data lines, for a predetermined time, and then supply the same polarity precharge voltage as the polarity when writing the data signals on the data lines in a next sequence.

摘要翻译： 液晶显示装置中的数据驱动器的输出电路进行点反转驱动方式。 输出电路包括放大器，其输出数据线上的数据信号，将数据线与放大器分开的开关和将数据线之间的线路短路预定时间的短路/预充电电路，然后提供相同的极性预充电电压 作为在数据线上以下一个顺序写入数据信号时的极性。

公开(公告)号：US5070295A

公开(公告)日：1991-12-03

申请号：US687387

申请日：1991-04-18

申请人： Takashi Morigami

发明人： Takashi Morigami

IPC分类号： H03K17/22

CPC分类号： H03K17/22 ,  H03K2217/0018 ,  Y10S323/901

摘要： A power-on reset circuit has first and second reference potential circuits and a comparator. The first and second reference potential circuits are such that their output voltage curves with respect to the power supply voltages intersect at a predetermined power supply voltage. The comparator compares output voltages of the first and second reference potential circuits. The first reference potential circuit has a first and a second resistor connected in series and a first non-linear resistor element circuit all connected between a first and a second power supply terminal. A node between the first and second resistors forms an output terminal of the first reference potential circuit. The second reference potential circuit has a third, fourth and fifth resistors connected in series between the first and second power supply terminals and a second non-linear resistor element circuit connected in parallel to the fourth resistor. A node between the third and fourth resistors forms an output terminal of the second reference potential circuit. According to this arrangement, even when the power supply voltage is low, a change in the output voltage of the first reference potential circuit and that in the second reference potential circuit occur on characteristic lines different from each other so that the two output voltages will never become the same voltage.

摘要翻译： 上电复位电路具有第一和第二参考电位电路和比较器。 第一和第二参考电位电路使得它们的输出电压相对于电源电压曲线以预定的电源电压相交。 比较器比较第一和第二参考电位电路的输出电压。 第一参考电位电路具有串联连接的第一和第二电阻器以及全部连接在第一和第二电源端子之间的第一非线性电阻元件电路。 第一和第二电阻之间的节点形成第一参考电位电路的输出端。 第二参考电位电路具有串联连接在第一和第二电源端子之间的第三，第四和第五电阻器以及与第四电阻器并联连接的第二非线性电阻器元件电路。 第三和第四电阻之间的节点形成第二参考电位电路的输出端。 根据该结构，即使在电源电压低的情况下，第一基准电位电路的输出电压与第二基准电位电路的输出电压的变化发生在彼此不同的特性线上，使得两个输出电压将永远不变 变成相同的电压。