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    PROGRAMMABLE NETWORK SEGMENTATION FOR MULTI-TENANT FPGAS IN CLOUD INFRASTRUCTURES
    2.
    发明申请
    PROGRAMMABLE NETWORK SEGMENTATION FOR MULTI-TENANT FPGAS IN CLOUD INFRASTRUCTURES 有权

    公开(公告)号：US20220321403A1

    公开(公告)日：2022-10-06

    申请号：US17221057

    申请日：2021-04-02

    Applicant: Nokia Solutions and Networks Oy

    Inventor： Andrea ENRICI ,  Bogdan USCUMLIC

    IPC: H04L12/24 ,  H04L29/08

    Abstract: A network device for managing network segmentation in a network infrastructure includes at least one processor, and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the at least one processor, cause the network device to receive a request to execute a distributed workload, the request including distributed workload information, compute a network configuration for the network infrastructure based on the distributed workload information and a current status of the network infrastructure, and configure a plurality of reconfigurable resources of a programmable device to execute the distributed workload based on the network configuration.

    MANAGEMENT AND IMPLEMENTATION OF APPLICATIONS IN CLOUD-BASED FPGAS
    3.
    发明申请
    MANAGEMENT AND IMPLEMENTATION OF APPLICATIONS IN CLOUD-BASED FPGAS 有权

    公开(公告)号：US20220131915A1

    公开(公告)日：2022-04-28

    申请号：US17081464

    申请日：2020-10-27

    Applicant: Nokia Solutions and Networks Oy

    Inventor： Andrea ENRICI ,  Faycal AIT AOUDIA ,  Julien LALLET

    IPC: H04L29/06 ,  G06F30/34

    Abstract: A network-based apparatus includes at least one processor and at least one memory including computer program code. The at least one memory and the computer program code are configured to, with the at least one processor, cause the network-based apparatus to: select at least a first bitstream from a central repository based on an indicator associated with a probability of concurrent, simultaneous or future execution of the first bitstream and a second bitstream at a network node, each of the first bitstream and the second bitstream including programming information for a device at the network node, the indicator being based on an embedding matrix mapping at least a subset of bitstreams in the central repository to an N-dimensional vector of real numbers; and output the first bitstream to the network node for storage and execution upon request.

    DISTRIBUTION OF MACHINE LEARNING WORKFLOWS ON WEBSCALE INFRASTRUCTURES
    5.
    发明申请
    DISTRIBUTION OF MACHINE LEARNING WORKFLOWS ON WEBSCALE INFRASTRUCTURES 有权

    公开(公告)号：US20220345535A1

    公开(公告)日：2022-10-27

    申请号：US17239822

    申请日：2021-04-26

    Applicant: Nokia Solutions and Networks Oy

    Inventor： Andrea ENRICI

    IPC: H04L29/08 ,  G06F16/901 ,  H04L12/24

    Abstract: A network device includes processing circuitry configured to cause the network device to: partition a flow graph for an application to generate a partitioned graph of nodes and edges, each of the nodes including computations mapped to an execution unit to execute at least a portion of the application, and each of the edges denoting communications between execution units; determine whether the partitioned graph is an irreducible graph; and schedule the computations and the communications for execution in response to determining that the partitioned graph is an irreducible graph.

    DEDICATED MEMORY BUFFERS FOR SUPPORTING DETERMINISTIC INTER-FPGA COMMUNICATION
    6.
    发明申请
    DEDICATED MEMORY BUFFERS FOR SUPPORTING DETERMINISTIC INTER-FPGA COMMUNICATION 有权

    公开(公告)号：US20210406178A1

    公开(公告)日：2021-12-30

    申请号：US16911680

    申请日：2020-06-25

    Applicant: Nokia Solutions and Networks Oy

    Inventor： Andrea ENRICI ,  Bogdan USCUMLIC

    IPC: G06F12/0806

    Abstract: A server includes a field programmable gate array (FPGA) partitioned into a set of partial reconfiguration (PR) slots and a memory that supports a set of logical buffers. A deterministic application request module (DARM) receives application requests to allocate the set of reconfiguration slots to one or more tenants and the one or more tenants configure the allocated reconfiguration slot to perform tasks. The DARM stores data associated with the application request in a first logical buffer from the set of logical buffers. A reconfiguration slot scheduling (RSS) module identifies a first reconfiguration slot from the set of reconfiguration slots and associates the first reconfiguration slot with the first logical buffer. A reconfiguration slot initialization (RSI) module reconfigures the first reconfiguration slot to perform the tasks based on the data stored in the first logical buffer.

    PROTOCOL INDEPENDENT DETERMINISTIC TRANSPORT OF DATA IN A TIME-SENSITIVE NETWORK
    7.
    发明公开
    PROTOCOL INDEPENDENT DETERMINISTIC TRANSPORT OF DATA IN A TIME-SENSITIVE NETWORK 审中-公开

    公开(公告)号：US20240236005A1

    公开(公告)日：2024-07-11

    申请号：US18525978

    申请日：2023-12-01

    Applicant: Nokia Solutions and Networks OY

    Inventor： Bogdan USCUMLIC ,  Andrea ENRICI

    IPC: H04L47/22 ,  H04L41/14

    CPC classification number: H04L47/22 ,  H04L41/145

    Abstract: In some examples, an apparatus for protocol independent deterministic transport of data in a time-sensitive network comprises a processor, a memory coupled to the processor, the memory configured to store program code executable by the processor, the program code comprising one or more instructions, whereby to cause the apparatus to receive synchronisation data from the network, the synchronisation data comprising a measure for a clock frequency supporting transport of deterministic data traffic over the network,



    receive multiple input packets, the input packets comprising deterministic data traffic and non-deterministic data traffic, and generate, from the multiple input packets and using the synchronisation data, a set of isochronous output packets comprising respective payloads and headers.

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