公开(公告)号：US20100255579A1

公开(公告)日：2010-10-07

申请号：US12702274

申请日：2010-02-08

申请人： Noriyuki SATO ,  Tomohide Tsukahara ,  Yuki Nabeta ,  Satoshi Kawaguchi ,  Hideyuki Ikeda ,  Takuro Wada ,  Toshihiko Yamashita

发明人： Noriyuki SATO ,  Tomohide Tsukahara ,  Yuki Nabeta ,  Satoshi Kawaguchi ,  Hideyuki Ikeda ,  Takuro Wada ,  Toshihiko Yamashita

IPC分类号： C12N5/02 ,  C07K14/47 ,  C07H21/04

CPC分类号： A61K38/1709 ,  A61K39/00 ,  C07K14/4748

摘要： An inducer of cytotoxic T cells comprising as an active ingredient a protein which comprises the same or substantially the same amino acid sequence as that shown in SEQ ID NO: 2, or a peptide derived from the protein above is provided.

摘要翻译： 提供包含作为活性成分的包含与SEQ ID NO：2所示相同或基本相同的氨基酸序列的蛋白质或来自上述蛋白质的肽的细胞毒性T细胞的诱导剂。

公开(公告)号：US20100202078A1

公开(公告)日：2010-08-12

申请号：US12761317

申请日：2010-04-15

申请人： Noriyuki SATO

发明人： Noriyuki SATO

IPC分类号： G11B27/36

CPC分类号： G11B19/041 ,  G11B20/10527 ,  G11B2020/10537 ,  G11B2020/10759 ,  G11B2020/10944 ,  G11B2020/183 ,  G11B2220/2516

摘要： According to one embodiment, a medium recording device includes a reading/writing module configured to read/write data from/to a recording medium, a buffer memory configured to temporarily store the read data and data from a host, and a controlling circuit configured to, in response to a read command, read data from the buffer memory or the recording medium to transfer the data to the host, and in response to a write command, to store data from the host in the buffer memory, to write the data onto the recording medium, and to execute a write retry when writing fails. The controller circuit recognizes a read command issued by the host at a fixed interval for replaying continuous data, and determines whether write in response to a write command received during the replaying is likely to fail, and when the write is likely to fail, permits a reception of the read command issued at the fixed interval.

摘要翻译： 根据一个实施例，介质记录装置包括被配置为从记录介质读取/写入数据的读/写模块，被配置为临时存储来自主机的读取数据和数据的缓冲存储器，以及控制电路， 响应于读取命令，从缓冲存储器或记录介质读取数据以将数据传送到主机，并且响应于写命令，将来自主机的数据存储在缓冲存储器中，以将数据写入到 记录介质，并且在写入失败时执行写入重试。 控制器电路以固定的间隔识别由主机发出的用于重放连续数据的读取命令，并且确定响应于在重放期间接收到的写入命令的写入是否可能失败，并且当写入可能失败时，允许 接收以固定间隔发出的读命令。

公开(公告)号：US20200098824A1

公开(公告)日：2020-03-26

申请号：US16142040

申请日：2018-09-26

申请人： Abhishek SHARMA ,  Gregory K. CHEN ,  Ram KRISHNAMURTHY ,  Ravi PILLARISETTY ,  Sasikanth MANIPATRUNI ,  Amrita MATHURIYA ,  Raghavan KUMAR ,  Phil KNAG ,  Huseyin SUMBUL ,  Urusa ALAAN ,  Noriyuki SATO

发明人： Abhishek SHARMA ,  Gregory K. CHEN ,  Ram KRISHNAMURTHY ,  Ravi PILLARISETTY ,  Sasikanth MANIPATRUNI ,  Amrita MATHURIYA ,  Raghavan KUMAR ,  Phil KNAG ,  Huseyin SUMBUL ,  Urusa ALAAN ,  Noriyuki SATO

IPC分类号： H01L27/24 ,  H01L45/00

摘要： Embodiments herein describe techniques for a semiconductor device including a RRAM memory cell. The RRAM memory cell includes a substrate, a RRAM storage cell above the substrate, and a diode adjacent to the RRAM storage cell. The RRAM storage cell includes a first electrode located in a first metal layer above the substrate, a resistive switching material layer adjacent to the first electrode, and a second electrode adjacent to the resistive switching material layer. The second electrode is shared between the RRAM storage cell and the diode. The diode includes the second electrode shared with the RRAM storage cell, a semiconductor layer adjacent to the second electrode, and a third electrode located in a second metal layer above the substrate. Other embodiments may be described and/or claimed.